Update CMSIS third party download (#2716)

CMSIS is updated from CMSIS_5 to CMSIS_6.

BUG=It is recommended to upgrade from CMSIS_5 to CMSIS_6

tensorflow/lite/micro/cortex_m_corstone_300/README.md

@@ -11,11 +11,10 @@ https://developer.arm.com/ip-products/subsystem/corstone/corstone-300)
 Building the Corstone-300 based target has the following dependencies:
 
 -   [Arm Ethos-U Core Platform](https://review.mlplatform.org/admin/repos/ml/ethos-u/ethos-u-core-platform)
-    -   Arm Ethos-U Core Platform provides the linker file as well as UART and
-        retarget functions.
--   [CMSIS](https://github.com/ARM-software/CMSIS_5)
-    -   CMSIS provides startup functionality, e.g. for setting up interrupt
-        handlers and clock speed.
+    -   Arm Ethos-U Core Platform provides the linker file as well as UART and retarget functions.
+-   [CMSIS](https://github.com/ARM-software/CMSIS_6) + [CMSIS-Cortex_DFP](https://github.com/ARM-software/Cortex_DFP)
+    -   CMSIS provides startup functionality, e.g. for setting up interrupt handlers and clock speed.
+    -   See cmsis_download.sh for how these are downloaded relative to each other for the given examples and make targets.
 
 Both these repositories are downloaded automatically by the build process in
 TFLM.

tensorflow/lite/micro/docs/optimized_kernel_implementations.md

@@ -100,8 +100,8 @@ The optimized kernel architecture is composed of the following three modules:
 
 This library uses knowledge of the hardware and compiler to implement the
 underlying operations. Examples of this are
-[CMSIS-NN](https://github.com/ARM-software/CMSIS_5/tree/develop/CMSIS/NN) from
-ARM and [NNLib](https://github.com/foss-xtensa/nnlib-hifi4) from Cadence.
+[CMSIS-NN](https://github.com/ARM-software/CMSIS-NN) from Arm and
+[NNLib](https://github.com/foss-xtensa/nnlib-hifi4) from Cadence.
 
 The benefits of having this API separation are:
 

tensorflow/lite/micro/tools/make/ext_libs/cmsis_download.sh

@@ -1,5 +1,5 @@
 #!/bin/bash
-# Copyright 2023 The TensorFlow Authors. All Rights Reserved.
+# Copyright 2024 The TensorFlow Authors. All Rights Reserved.
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
 # you may not use this file except in compliance with the License.
@@ -42,22 +42,35 @@ if [ ! -d ${DOWNLOADS_DIR} ]; then
 fi
 
 DOWNLOADED_CMSIS_PATH=${DOWNLOADS_DIR}/cmsis
+DOWNLOADED_CORTEX_DFP_PATH=${DOWNLOADS_DIR}/cmsis/Cortex_DFP
 
 if [ -d ${DOWNLOADED_CMSIS_PATH} ]; then
   echo >&2 "${DOWNLOADED_CMSIS_PATH} already exists, skipping the download."
 else
 
-  ZIP_PREFIX="e94a96201a97be3e84d3d6ef081d2f0f7db9b5fd"
-  CMSIS_URL="http://github.com/ARM-software/CMSIS_5/archive/${ZIP_PREFIX}.zip"
-  CMSIS_MD5="e72a40716ca8adca690b91819c69d83e"
+  ZIP_PREFIX="5782d6f8057906d360f4b95ec08a2354afe5c9b9"
+  CMSIS_URL="http://github.com/ARM-software/CMSIS_6/archive/${ZIP_PREFIX}.zip"
+  CMSIS_MD5="563e7c6465f63bdc034359e9b536b366"
 
   # wget is much faster than git clone of the entire repo. So we wget a specific
   # version and can then apply a patch, as needed.
   wget ${CMSIS_URL} -O /tmp/${ZIP_PREFIX}.zip >&2
   check_md5 /tmp/${ZIP_PREFIX}.zip ${CMSIS_MD5}
 
   unzip -qo /tmp/${ZIP_PREFIX}.zip -d /tmp >&2
-  mv /tmp/CMSIS_5-${ZIP_PREFIX} ${DOWNLOADED_CMSIS_PATH}
+  mv /tmp/CMSIS_6-${ZIP_PREFIX} ${DOWNLOADED_CMSIS_PATH}
+
+  # Also pull the related CMSIS Cortex_DFP component for generic Arm Cortex-M device support
+  ZIP_PREFIX="c2c70a97a20fb355815e2ead3d4a40e35a4a3cdf"
+  CMSIS_DFP_URL="http://github.com/ARM-software/Cortex_DFP/archive/${ZIP_PREFIX}.zip"
+  CMSIS_DFP_MD5="3cbb6955b6d093a2fe078ef2341f6b89"
+
+  wget ${CMSIS_DFP_URL} -O /tmp/${ZIP_PREFIX}.zip >&2
+  check_md5 /tmp/${ZIP_PREFIX}.zip ${CMSIS_DFP_MD5}
+
+  unzip -qo /tmp/${ZIP_PREFIX}.zip -d /tmp >&2
+  mv /tmp/Cortex_DFP-${ZIP_PREFIX} ${DOWNLOADED_CORTEX_DFP_PATH}
+
 fi
 
 echo "SUCCESS"

tensorflow/lite/micro/tools/make/ext_libs/cmsis_nn.inc

@@ -42,7 +42,7 @@ THIRD_PARTY_CC_HDRS += $(shell find $(CMSIS_NN_PATH)/Include -name "*.h")
 # project generation scripts copy over the compiler specific implementations of
 # the various intrinisics.
 THIRD_PARTY_CC_HDRS += \
-  $(CMSIS_PATH)/LICENSE.txt \
+  $(CMSIS_PATH)/LICENSE \
   $(CMSIS_NN_PATH)/LICENSE \
   $(wildcard $(CMSIS_PATH)/CMSIS/Core/Include/*.h)
 

tensorflow/lite/micro/tools/make/targets/cortex_m_corstone_300_makefile.inc

@@ -63,7 +63,6 @@ else ifeq ($(TARGET_ARCH), cortex-m4+fp)
   ARMC6_LDFLAGS += -Wl,--cpu=Cortex-M4
   FLOAT=hard
   MCPU_OPTION := cortex-m4
-  CMSIS_ARM_FEATURES := _FP
 
 else ifeq ($(TARGET_ARCH), cortex-m55)
   ARMC6_LDFLAGS += -Wl,--cpu=8.1-M.Main.mve.fp
@@ -77,7 +76,6 @@ else ifeq ($(TARGET_ARCH), cortex-m7+fp)
   ARMC6_LDFLAGS += -Wl,--cpu=Cortex-M7
   FLOAT=hard
   MCPU_OPTION := cortex-m7
-  CMSIS_ARM_FEATURES := _DP
 
 else
   $(error "TARGET_ARCH=$(TARGET_ARCH) is not supported")
@@ -110,7 +108,7 @@ ifeq ($(TOOLCHAIN), armclang)
   ARMC6_LDFLAGS += -Wl,--load_addr_map_info,--xref,--callgraph,--symbols
   ARMC6_LDFLAGS += -Wl,--info,sizes,--info,totals,--info,unused,--info,veneers
   ARMC6_LDFLAGS += -Wl,--list=gen/$(TARGET).map
-  ARMC6_LDFLAGS += -Wl,--entry=Reset_Handler  --verbose
+  ARMC6_LDFLAGS += -Wl,--entry=Reset_Handler --verbose
   ARMC6_LDFLAGS += -Wl,--scatter=$(ETHOS_U_CORE_PLATFORM)/platform.scatter
 
   # Pass a hint to the linker where to find the entry point. This needs to be
@@ -182,11 +180,11 @@ PLATFORM_FLAGS = \
 CXXFLAGS += $(PLATFORM_FLAGS)
 CCFLAGS += $(PLATFORM_FLAGS)
 
-CXXFLAGS += -D$(ARM_CPU)$(CMSIS_ARM_FEATURES)
-CCFLAGS += -D$(ARM_CPU)$(CMSIS_ARM_FEATURES)
+CXXFLAGS += -D$(ARM_CPU)
+CCFLAGS += -D$(ARM_CPU)
 
 # For Ethos-U Core Driver. Header file name is depending on target architecture.
-CXXFLAGS += -DCMSIS_DEVICE_ARM_CORTEX_M_XX_HEADER_FILE=\"$(ARM_CPU)$(CMSIS_ARM_FEATURES).h\"
+CXXFLAGS += -DCMSIS_DEVICE_ARM_CORTEX_M_XX_HEADER_FILE=\"$(ARM_CPU).h\"
 
 THIRD_PARTY_CC_SRCS += \
   $(ETHOS_U_CORE_PLATFORM)/retarget.c \
@@ -199,10 +197,10 @@ endif
 CMSIS_DEFAULT_DOWNLOAD_PATH := $(DOWNLOADS_DIR)/cmsis
 CMSIS_PATH := $(CMSIS_DEFAULT_DOWNLOAD_PATH)
 THIRD_PARTY_CC_SRCS += \
-  $(CMSIS_PATH)/Device/ARM/$(ARM_CPU)/Source/system_$(ARM_CPU).c \
-  $(CMSIS_PATH)/Device/ARM/$(ARM_CPU)/Source/startup_$(ARM_CPU).c
+  $(CMSIS_PATH)/Cortex_DFP/Device/$(ARM_CPU)/Source/system_$(ARM_CPU).c \
+  $(CMSIS_PATH)/Cortex_DFP/Device/$(ARM_CPU)/Source/startup_$(ARM_CPU).c
 INCLUDES += \
-  -I$(CMSIS_PATH)/Device/ARM/$(ARM_CPU)/Include \
+  -I$(CMSIS_PATH)/Cortex_DFP/Device/$(ARM_CPU)/Include \
   -I$(CMSIS_PATH)/CMSIS/Core/Include
 
 # TODO(#274): Examine why some tests fail here.

tensorflow/lite/micro/tools/make/targets/cortex_m_generic_makefile.inc

@@ -47,7 +47,6 @@ else ifeq ($(TARGET_ARCH), cortex-m3)
 else ifeq ($(TARGET_ARCH), cortex-m33)
   CORE=M33
   ARM_LDFLAGS := -Wl,--cpu=Cortex-M33
-  CMSIS_ARM_FEATURES := _DSP_FP
   FLOAT=hard
 
 else ifeq ($(TARGET_ARCH), cortex-m33+nodsp)
@@ -62,14 +61,12 @@ else ifeq ($(TARGET_ARCH), cortex-m4)
 else ifeq ($(TARGET_ARCH), cortex-m4+fp)
   CORE=M4
   ARM_LDFLAGS := -Wl,--cpu=Cortex-M4
-  CMSIS_ARM_FEATURES := _FP
   FLOAT=hard
   GCC_TARGET_ARCH := cortex-m4
 
 else ifeq ($(TARGET_ARCH), cortex-m4+sfp)
   CORE=M4
   ARM_LDFLAGS := -Wl,--cpu=Cortex-M4
-  CMSIS_ARM_FEATURES := _FP
   FLOAT=softfp
   GCC_TARGET_ARCH := cortex-m4
 
@@ -96,7 +93,6 @@ else ifeq ($(TARGET_ARCH), cortex-m7+fp)
   ARM_LDFLAGS := -Wl,--cpu=Cortex-M7
   FLOAT=hard
   GCC_TARGET_ARCH := cortex-m7
-  CMSIS_ARM_FEATURES := _DP
 
 else ifeq ($(TARGET_ARCH), cortex-m85)
   CORE=M85
@@ -114,7 +110,7 @@ ARM_CPU := "ARMC$(CORE)"
 CMSIS_DEFAULT_DOWNLOAD_PATH := $(MAKEFILE_DIR)/downloads/cmsis
 CMSIS_PATH := $(CMSIS_DEFAULT_DOWNLOAD_PATH)
 INCLUDES += \
-  -I$(CMSIS_PATH)/Device/ARM/$(ARM_CPU)/Include \
+  -I$(CMSIS_PATH)/Cortex_DFP/Device/$(ARM_CPU)/Include \
   -I$(CMSIS_PATH)/CMSIS/Core/Include
 
 ifneq ($(filter cortex-m55%,$(TARGET_ARCH)),)
@@ -187,7 +183,7 @@ PLATFORM_FLAGS = \
   -DCPU_$(CORE)=1
 
 # For DWT/PMU counters. Header file name is depending on target architecture.
-PLATFORM_FLAGS += -DCMSIS_DEVICE_ARM_CORTEX_M_XX_HEADER_FILE=\"$(ARM_CPU)$(CMSIS_ARM_FEATURES).h\"
+PLATFORM_FLAGS += -DCMSIS_DEVICE_ARM_CORTEX_M_XX_HEADER_FILE=\"$(ARM_CPU).h\"
 PLATFORM_FLAGS += -D$(ARM_CPU)
 
 # Arm Cortex-M55 and Cortex-M85 use PMU counters.