Arm has specifically defined only the single set of double underscore…

…s rather than leading and trailing underscores for macro definitions. Both are still defined for arm32 as well so this change works for both 32-bit arm and aarch64. PiperOrigin-RevId: 609146591
tensorflow · Feb 21, 2024 · 2ab7750 · 2ab7750
1 parent 36ec2c6
commit 2ab7750
Show file tree

Hide file tree

Showing 3 changed files with 8 additions and 8 deletions.
diff --git a/tensorflow_lite_support/scann_ondevice/cc/core/index_table_sum.h b/tensorflow_lite_support/scann_ondevice/cc/core/index_table_sum.h
@@ -195,7 +195,7 @@ void IndexTableSum(const uint8_t* indices, size_t num_chunks,
       indices, num_chunks, num_outputs, lookup_table, batch_size, num_centers,
       min, max, i, output);
 #endif
-#ifdef __ARM_NEON__
+#ifdef __ARM_NEON
   i = IndexTableSumSimdBatch<SimdInt16x8, LutType>(
       indices, num_chunks, num_outputs, lookup_table, batch_size, num_centers,
       min, max, i, output);
@@ -222,7 +222,7 @@ inline void IndexTableSum<float>(const uint8_t* indices, size_t num_chunks,
       indices, num_chunks, num_outputs, lookup_table, batch_size, num_centers,
       min, max, i, output);
 #endif
-#ifdef __ARM_NEON__
+#ifdef __ARM_NEON
   i = IndexTableSumSimdBatch<SimdFloat32x4, float>(
       indices, num_chunks, num_outputs, lookup_table, batch_size, num_centers,
       min, max, i, output);

diff --git a/tensorflow_lite_support/scann_ondevice/cc/core/searcher_test.cc b/tensorflow_lite_support/scann_ondevice/cc/core/searcher_test.cc
@@ -362,7 +362,7 @@ TEST_P(SearcherTest, AsymmetricHashNonSimd) {
   EXPECT_NEAR(5.79, extracted[2].first, kEps);
 }
 
-#if defined(__ARM_NEON__) || defined(__SSE__)
+#if defined(__ARM_NEON) || defined(__SSE__)
 TEST_P(SearcherTest, AsymmetricHashSimdFloat32x4) {
   MatrixXf query(5, 6);
   query << 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 1, 0, 0, 1, 1, 0, 1, 0, 1, 0,
@@ -414,7 +414,7 @@ TEST_P(SearcherTest, AsymmetricHashSimdFloat32x4) {
 }
 #endif
 
-#if defined(__ARM_NEON__) || defined(__SSE__)
+#if defined(__ARM_NEON) || defined(__SSE__)
 TEST_P(SearcherTest, AsymmetricHashSimdInt16x8) {
   MatrixXf query(5, 11);
   query << 0, 0, 1, 0, 1, 1, 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0,
@@ -496,7 +496,7 @@ TEST_P(SearcherTest, AsymmetricHashSimdInt16x8) {
 }
 #endif
 
-#if defined(__ARM_NEON__) || defined(__SSE__)
+#if defined(__ARM_NEON) || defined(__SSE__)
 TEST_P(SearcherTest, AsymmetricHashMiniBatchedSimdFail) {
   std::shared_ptr<Matrix8u> database(new Matrix8u(2, 9));
   *database << 0, 0, 0, 1, 1, 1, 2, 2, 2, 0, 1, 2, 0, 1, 2, 0, 1, 2;

diff --git a/tensorflow_lite_support/scann_ondevice/cc/core/simd_utils.h b/tensorflow_lite_support/scann_ondevice/cc/core/simd_utils.h
@@ -20,7 +20,7 @@ limitations under the License.
 #ifdef __SSE__
 #include <x86intrin.h>
 #endif
-#ifdef __ARM_NEON__
+#ifdef __ARM_NEON
 #include <arm_neon.h>
 #endif
 
@@ -101,7 +101,7 @@ class SimdFloat32x8 {
   }
 };
 #endif
-#ifdef __ARM_NEON__
+#ifdef __ARM_NEON
 class SimdFloat32x4 {
   float32x4_t value_;
 
@@ -198,7 +198,7 @@ class SimdInt16x8 {
   }
 };
 #endif
-#ifdef __ARM_NEON__
+#ifdef __ARM_NEON
 class SimdInt16x8 {
   uint16x8_t value_;