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topology2: add development tplg to test playback with 2 cores
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This is to allow CI to test a simple multicore playback case on
MTL/TGL/ADL: SSP0 playback on core 0 and SSP2 playback on core 1.

Capture uses core 0 only atm. More multicore usage will be
introduced later.

Signed-off-by: Mengdong Lin <[email protected]>
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mengdonglin authored and kv2019i committed Jun 12, 2023
1 parent 65dc05a commit a5c0c49
Showing 1 changed file with 9 additions and 0 deletions.
9 changes: 9 additions & 0 deletions tools/topology/topology2/development/tplg-targets.cmake
Original file line number Diff line number Diff line change
Expand Up @@ -20,6 +20,12 @@ SSP0_MIXER_2LEVEL=1,PLATFORM=tgl"
PREPROCESS_PLUGINS=nhlt,NHLT_BIN=nhlt-sof-adl-nocodec.bin,DEEPBUFFER_FW_DMA_MS=100,\
PLATFORM=adl"

"cavs-nocodec-multicore\;sof-tgl-nocodec-multicore-ssp0-ssp2\;PLATFORM=tgl,SSP1_ENABLED=false,\
SSP2_CORE_ID=1,PREPROCESS_PLUGINS=nhlt,NHLT_BIN=nhlt-sof-tgl-nocodec.bin"

"cavs-nocodec-multicore\;sof-adl-nocodec-multicore-ssp0-ssp2\;PLATFORM=adl,SSP1_ENABLED=false,\
SSP2_CORE_ID=1,PREPROCESS_PLUGINS=nhlt,NHLT_BIN=nhlt-sof-adl-nocodec.bin"

# SDW topology for MTL
"cavs-sdw\;mtl-sdw\;NUM_HDMIS=0"

Expand All @@ -37,6 +43,9 @@ DEEPBUFFER_D0I3_COMPATIBLE=true"
"cavs-nocodec-multicore\;sof-mtl-nocodec-multicore\;PLATFORM=mtl,SSP1_ENABLED=true,SSP0_CORE_ID=0,\
SSP1_CORE_ID=1,SSP2_CORE_ID=2,PREPROCESS_PLUGINS=nhlt,NHLT_BIN=nhlt-sof-mtl-nocodec.bin"

"cavs-nocodec-multicore\;sof-mtl-nocodec-multicore-ssp0-ssp2\;PLATFORM=mtl,SSP1_ENABLED=false,\
SSP2_CORE_ID=1,PREPROCESS_PLUGINS=nhlt,NHLT_BIN=nhlt-sof-mtl-nocodec.bin"

# SSP topology for LNL FPGA with lower DMIC IO clock of 19.2MHz, 2ch PDM1 enabled
"cavs-nocodec\;sof-lnl-nocodec-fpga-2ch-pdm1\;PLATFORM=lnl,NUM_DMICS=2,PDM1_MIC_A_ENABLE=1,\
PDM1_MIC_B_ENABLE=1,PDM0_MIC_A_ENABLE=0,PDM0_MIC_B_ENABLE=0,PREPROCESS_PLUGINS=nhlt,\
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