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mpfs_opensbi: Re-organize SBI areas so that RW areas follow each other #185

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c6ad5be
boards/riscv/mpfs/icicle/configs/standalone: Add a standalone target
jlaitine Nov 22, 2021
ffd0ae5
Fix the check workflow for tiiuae repo
jlaitine Nov 24, 2021
477df1a
arch/risc-v/src/opensbi/Make.defs: Switch opensbi to the nuttx/size o…
jlaitine Jul 21, 2022
c9f3f90
[REVERTME] arch/risc-v/src/mpfs/mpfs_ethernet.c: Hack the ethernet dr…
jlaitine Aug 17, 2022
902c21a
[HACK] Set SD-card speed to 50MHz
jlaitine Sep 14, 2022
c03e56b
opensbi: Take SBI version that removes console into use
pussuw Sep 20, 2022
f10e650
Fix standalone defconfig for CI
jlaitine Sep 28, 2022
adfe82a
arch/risc-v/src/mpfs/mpfs_clockconfig.c: Flag out code only used in b…
jlaitine Sep 28, 2022
dd3fe0b
arch/risc-v/src/mpfs: Add mpfs canfd socket can driver
haitomatic May 26, 2022
b4414cb
boards/risc-v/mpfs/icicle: add new target for testing mpfs canfd driver
haitomatic Jun 15, 2022
75cbc77
mpfs/emmcsd: Set same base clock for SDR/DDR modes
pussuw Nov 30, 2022
a4e0296
mpfs/emmcsd: [HACK] Set 8-bit data width and DDR HS mode for eMMC
pussuw Nov 30, 2022
5158a1a
mpfs/emmcsd: Fix build issue with 8-bit HS mode
pussuw Nov 30, 2022
51991d6
Fix build.yml
jpaali Dec 12, 2022
95b4d63
risc-v/mpfs: ihc: Make IHC HSS workaround configurable
jpaali Sep 9, 2022
526ae42
drivers/net/rpmsgdrv.c: Take netdev_register() return value into account
jpaali Sep 27, 2022
3ce90e5
drivers/net/rpmsgdrv.c: Support only TRANSFER commands
jpaali Dec 13, 2022
5da097c
arch/risc-v/src/mpfs/mpfs_ihc.c: Increase RPMSG buffer size
jpaali Nov 30, 2022
8c5745b
mpfs_ihc: Make Vring addresses configurable
jpaali Dec 2, 2022
fcb4f6f
arch/risc-v/src/mpfs/mpfs_fpga_canfd.c: Fix CONFIG_DEBUG_CAN_INFO ifd…
jlaitine Jan 19, 2023
e66ee29
boards/risc-v/mpfs/icicle/configs/canfd/defconfig: Normalize
jlaitine Jan 19, 2023
d5b4484
remove devif_loopback in canfd driver since it is now devif_poll func…
haitomatic Jan 19, 2023
a9855a5
arch/risc-v/src/mpfs/mpfs_ihc.c: Minor fixes
jpaali Jan 27, 2023
9200709
Remove MPFS_IHC_LINUX_ON_HART4 from default configurations
jpaali Jan 27, 2023
da7fcae
arch/arm/src/stm32f7/stm32_ethernet.c: Fix "unused variable" warning
jlaitine Feb 3, 2023
62d55b7
arch/risc-v/src/mpfs/mpfs_userspace.c: Map MTIME into userspace reser…
jlaitine Feb 9, 2023
26f28ec
boards/risc-v/mpfs/icicle: Add USRIO area for userspace IO mappings
jlaitine Feb 10, 2023
765313f
Add mpfs crypto driver into nuttx build
jlaitine Feb 13, 2023
7661ca1
mpfs/Kconfig: fix typo on config file
pussuw Feb 14, 2023
a8c0f1e
mpfs/mpfs_mm_init: Add the MTIME user mapping for kernel mode as well
pussuw Feb 14, 2023
669e6e2
arch/risc-v/src/mpfs/Kconfig: Don't source crypto/Kconfig
jlaitine Feb 23, 2023
9c96ac4
DP-4881: The latest NuttX OpenAMP version does not work with Saluki H…
sthirvela Feb 22, 2023
1fa7923
arch/risc-v/src/mpfs: symlink pf_crypto submodule
jnippula Mar 6, 2023
ccfeb55
arch/riscv/src/mpfs/mpfs_ethernet.c: discard err rxframe in int work
jnippula Mar 9, 2023
080730a
arch/risc-v/src/mpfs/crypto.defs: Update to include mpfs_systemservice.c
jlaitine Mar 16, 2023
17c79ab
arch/risc-v/src/mpfs: Generate an unique locally administrated MAC ad…
jlaitine Apr 3, 2023
f7c0a2d
emmc interrupt blackout issue fix
jnippula Apr 14, 2023
9e10f64
mpfs/mpfs_userspace: Increase user space size to 8MB
pussuw Apr 18, 2023
dd0851b
test: bootloader: apply ihc flow control
eenurkka Apr 3, 2023
0855101
risc-v/mpfs: apply ihc software flow control
eenurkka Mar 29, 2023
69a3ed7
risc-v/mpfs: ihc: use work queue instead of thread
eenurkka Apr 17, 2023
9049acb
canfd: fix hw filter
haitomatic Apr 27, 2023
4b40846
risc-v/mpfs: serial: add fpga uarts
eenurkka May 9, 2023
e278e43
Add CONFIG_MPFS_SPI flag to define using SOC hard-ip SPI block
jlaitine May 12, 2023
a4c60b8
arch/risc-v/src/mpfs: Remove CONFIG_MPFS_COREPWMx_PWMCLK configs
jlaitine May 12, 2023
64351a1
risc-v/mpfs: serial: fix uart closing
eenurkka May 12, 2023
6afcf21
Change MPFS_FPGA_UARTx_BASE addresses to 4k aligned as per new FPGA i…
jlaitine May 15, 2023
f5b0d4b
[REVERTME] arch/risc-v/src/mpfs/mpfs_corespi.c: Hack around a bug in …
jlaitine May 17, 2023
e67f54a
Add support for 2xCAN
haitomatic May 10, 2023
b9fa478
canfd : add missing configs for 2xCAN support
haitomatic May 16, 2023
f83649c
canfd : use board peripheral clock
haitomatic May 16, 2023
71c4864
canfd : normalize defconfig
haitomatic May 17, 2023
6429084
arch/risc-v/src/mpfs/mpfs_timerisr.c: Partially revert common mtime d…
jlaitine May 19, 2023
f34ce01
arch/risc-v/src/mpfs: Make mpfs_hart_index2id table modifiable by boo…
jlaitine May 24, 2023
b400e7a
Revert "[REVERTME] arch/risc-v/src/mpfs/mpfs_corespi.c: Hack around a…
jlaitine May 24, 2023
d9c7276
mpfs_timerisr: Add patch to make the code work in CONFIG_BUILD_KERNEL
pussuw May 24, 2023
c312a3b
arch/risc-v/src/mpfs/mpfs_opensbi.c: Fix conflicting datatypes define…
jlaitine May 25, 2023
c688040
net/can, net/devif: fix CAN RX/TX iob free semcount runaway issue
haitomatic May 22, 2023
226dbd9
arch/risc-v/src/mpfs/mpfs_dsn: Correct serial number reading routine
jlaitine Jun 16, 2023
96cc3b4
risc-v/mpfs: clean up ihc for rpmsg
eenurkka Jun 21, 2023
a5d1e67
mpfs_opensbi_utils.S: relocate OpenSBI into l2zerodevice
eenurkka Jun 22, 2023
b1c7173
opensbi: update to contain shrinked version
eenurkka Jun 27, 2023
ef92a6c
Revert "opensbi: update to contain shrinked version"
jnippula Jun 28, 2023
a505113
opensbi: update to contain shrinked version
jnippula Jun 28, 2023
6f2db08
risc-v/mpfs: ihc: don't wait for a remote ack
eenurkka Aug 9, 2023
dd9fee0
Disable linker relaxed addressing when loading gp
jnippula Aug 9, 2023
ec68b3d
risc-v/mpfs: clear L2 before use
eenurkka Aug 15, 2023
1fc7d2b
arch/risc-v/src/mpfs/mpfs_ddr.c: Correct the DDR training dq/dqs stat…
jlaitine Aug 24, 2023
c524902
arch/risc-v/src/mpfs/mpfs_ddr.c: Don't auto-determine the write latency
jlaitine Aug 24, 2023
1f9b2ba
arch/risc-v/src/mpfs/mpfs_ddr.c: Correct memory test timeouts
jlaitine Aug 24, 2023
2602afd
arch/risc-v/src/mpfs/mpfs_ddr.c: Make sure that DDRC is in reset when…
jlaitine Aug 24, 2023
ee58b2e
arch/risc-v/src/mpfs/mpfs_ddr.c: Add a simple prng for memory trainin…
jlaitine Aug 24, 2023
66eec9d
Revert "drivers/mmcsd: fix style issues"
pussuw Aug 28, 2023
9d3b9fa
Revert "Add eMMC driver support"
pussuw Aug 28, 2023
c356bfb
arch/risc-v/src/mpfs: Sync some of the libero config macros with HSS …
jlaitine Aug 29, 2023
3ce090e
arch/risc-v/src/mpfs/mpfs_ddr.c: Re-write write calibration
jlaitine Aug 27, 2023
2563e16
arch/risc-v/src/mpfs: Set USB DMA upper addr offset
jpaali Aug 30, 2023
25d9216
drivers/timers/pcf85263.c: Fix compilation
jlaitine Sep 5, 2023
19be1d8
drivers/net: Add a management driver for ksz9477 ethernet switch
jlaitine Aug 31, 2023
537e3ff
arch/risc-v/src/mpfs: Add ksz9477 initialization
jlaitine Aug 31, 2023
3472e29
arch/risc-v/src/mpfs/mpfs_i2c.c: Clean up using priv->status and STOP…
jlaitine Sep 11, 2023
393f37e
riscv/riscv_pmp.c: Improve NAPOT area validity checks
pussuw Aug 30, 2023
3b6acfa
mpfs/mpfs_i2c.c: Replace 1 second timeout with Time-on-Air based timeout
pussuw Aug 28, 2023
cd343a7
libs/libc: Fix a fatal bug in fread
SPRESENSE Sep 7, 2023
364a80a
stdio/lib_libfread: Fix buffer overflow issue
pussuw Sep 13, 2023
4093598
binfmt/binfmt_execmodule: Copy filename if CONFIG_BUILD_KERNEL and ar…
pussuw Sep 14, 2023
65cf286
risc-v/mpfs: Add DMA buffer allocator for eMMC access
pussuw Sep 15, 2023
1fe72b8
tools/ci: ensure removing python and openssl related commands
pkarashchenko Aug 29, 2023
67a45e7
tools/ci: Unify the version print: command xxx --version
xiaoxiang781216 Sep 13, 2023
feea81b
tools/ci: Fix "flock: Command not found" on macOS
xiaoxiang781216 Sep 13, 2023
0faa890
tools: Use GCC 13.2 from xPack for risc-v
no1wudi Sep 18, 2023
1ac9fb5
tools: Switch riscv GCC to 12.3
no1wudi Sep 19, 2023
8e7ec22
cibuild.sh: Using GCC from xPack for riscv
no1wudi Sep 19, 2023
6925383
rv32m1: Fix compile error
no1wudi Sep 20, 2023
5c02633
espressif: Force cast param in libc stubs
no1wudi Sep 20, 2023
3157f9d
boards/riscv: Fix module linker target
no1wudi Sep 20, 2023
b12c01c
boards/riscv: Add -melf64lriscv to 64bit USER_LDFLAGS/LDELFFLAGS
xiaoxiang781216 Aug 22, 2023
a4ee2da
arch/riscv: Move -mcmodel=medany from Make.defs to Toolchain.defs
xiaoxiang781216 Aug 22, 2023
1e8a8f3
risc-v/mpfs: ihc: don't wait for master if it's already up
eenurkka Sep 18, 2023
23a6163
risc-v/mpfs: emmcsd: deny unaligned access
eenurkka Sep 26, 2023
1f40a92
mpfs/mpfs_corespi: Several speed optimizations to the FPGA driver
pussuw Sep 22, 2023
16e2f09
risc-v/pgalloc.h: Add SHM area to riscv_uservaddr query
pussuw Sep 27, 2023
46ec2ab
risc-v/riscv_addrenv.c: Fix bug where SHM area page tables are not freed
pussuw Sep 27, 2023
ccbcb79
mm/kmap: Change kmm_user_map to kmm_map_user
pussuw Sep 29, 2023
5844fae
mm/kmap: Fix bug in kmm_unmap
pussuw Sep 29, 2023
62897c4
riscv/addrenv: Fix the user VMA end address
pussuw Sep 29, 2023
5c45123
[REVERTME] riscv_addrenc.c: Add more heap, if TLS_ALIGNED is set
pussuw Oct 4, 2023
8c04b71
riscv_addrenv_utils.c: Determine page table flags by type of vaddr
pussuw Oct 4, 2023
7d4fbfb
riscv-v/pgalloc.h: Return kernel vaddr for kernel RAM paddr
pussuw Oct 4, 2023
2a966a4
sched/assert.c: Print process name in assert dump
pussuw Oct 2, 2023
040d109
kmm_map.c: Fix call to gran_alloc
pussuw Oct 3, 2023
759228c
kmm_map.c: Fix user page mapping
pussuw Oct 3, 2023
28b00d3
kmm_map: Fix incorrect function name field
pussuw Oct 3, 2023
163398d
kmm_map.c: Add way to test if addr is within kmap area or not
pussuw Oct 3, 2023
054ebd1
kmm_map.c: Remember to free the temporary 'pages' variable
pussuw Oct 4, 2023
24b31cc
kmm_map: Add function to map a single page of kernel memory
pussuw Oct 5, 2023
a3ceafc
risc-v/mpfs/opensbi: update opensbi to version 1.3.1
eenurkka Oct 12, 2023
df1d24c
mpfs/mpfs_entrypoints.c: Fix potential R_RISCV_JAL linker error
pussuw Oct 11, 2023
b53ad83
mpfs_ethernet.c: Fix possible NULL de-reference
pussuw Oct 16, 2023
7e80998
mpfs_ethernet.c: Release tx descriptor and rx buffer properly
pussuw Oct 16, 2023
3866634
mpfs_head.S: Simplify clearing PMP
pussuw Oct 11, 2023
a96473f
arch/risc-v/src/mpfs/mpfs_ddr.c: Add read dq/dqs eye centering test
jlaitine Oct 10, 2023
38a04e3
arch/risc-v/src/mpfs/mpfs_ddr.c: Clean up the TXDLY verify step
jlaitine Oct 11, 2023
c266572
arch/risc-v/src/mpfs/mpfs_ddr.c: Fix CA training verify step
jlaitine Oct 11, 2023
4e4a88e
riscv/riscv_pmp.c: fix broken TOR checks
eenurkka Sep 20, 2023
76d2bd6
arch/risc-v: Remove unnecessary PMP kconfig options
pussuw Oct 23, 2023
076f358
arch/risc-v: Simplify pmp_check_region_attrs sanity-checks
pussuw Oct 23, 2023
cb8392f
mpfs_opensbi: Remove mpfs_opensbi_pmp_setup
pussuw Oct 10, 2023
d2c09b2
mpfs_entrypoints.c: Open all memory from PMP for hart before booting
pussuw Oct 17, 2023
5722d68
arch/mpfs: Add CONFIG_MPFS_BOARD_PMP option for PMP configuration
pussuw Oct 17, 2023
9b3a69a
Exec: Support run exec in current task
Sep 19, 2023
da552ca
sched/task_[posix]spawn: Simplify how spawn attributes are handled
pussuw Oct 25, 2023
3e8ead3
arch/risc-v/src/mpfs/mpfs_serial.c: Allow switching uart output to co…
jlaitine Oct 31, 2023
c74cd10
arch/risc-v/src/mpfs: Add hardware/mpfs_wdog.h
jnippula Nov 3, 2023
a18cb51
risc-v/mpfs: i2c: prevent out of bounds read access
eenurkka Nov 6, 2023
8d70256
risc-v/mpfs: add tamper detection support
eenurkka Nov 9, 2023
bc9dd58
risc-v/mpfs: tamper: refine tests
eenurkka Nov 13, 2023
bb125da
mpfs_opensbi: Re-organize SBI areas so that RW areas follow each other
pussuw Nov 27, 2023
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11 changes: 6 additions & 5 deletions .github/workflows/build.yml
Original file line number Diff line number Diff line change
Expand Up @@ -67,13 +67,13 @@ jobs:
# Determine the repo and leave that unset to use the normal checkout behavior
# of using the merge commit instead of HEAD
case $GITHUB_REPOSITORY in
"apache/nuttx")
"tiiuae/nuttx")
# OS
echo "Triggered by change in OS"
APPS_REF=$REF_NAME
;;

"apache/nuttx-apps" )
"tiiuae/incubator-nuttx-apps" )
# APPS
OS_REF=$REF_NAME
echo "Triggered by change in APPS"
Expand All @@ -91,7 +91,7 @@ jobs:
- name: Checkout nuttx repo
uses: actions/checkout@v3
with:
repository: apache/nuttx
repository: tiiuae/nuttx
ref: ${{ steps.gittargets.outputs.os_ref }}
path: sources/nuttx
fetch-depth: 1
Expand All @@ -101,7 +101,7 @@ jobs:
- name: Checkout apps repo
uses: actions/checkout@v3
with:
repository: apache/nuttx-apps
repository: tiiuae/incubator-nuttx-apps
ref: ${{ steps.gittargets.outputs.apps_ref }}
path: sources/apps
fetch-depth: 1
Expand All @@ -123,7 +123,7 @@ jobs:

strategy:
matrix:
boards: [arm-01, arm-02, arm-03, arm-04, arm-05, arm-06, arm-07, arm-08, arm-09, arm-10, arm-11, arm-12, arm-13, other, risc-v, sim-01, sim-02, xtensa, codechecker]
boards: [arm-12, risc-v]

steps:
- name: Download Source Artifact
Expand Down Expand Up @@ -173,6 +173,7 @@ jobs:
continue-on-error: true

macOS:
if: ${{ false }} # disable for now
permissions:
contents: none
runs-on: macos-13
Expand Down
2 changes: 1 addition & 1 deletion .github/workflows/check.yml
Original file line number Diff line number Diff line change
Expand Up @@ -32,7 +32,7 @@ jobs:
- name: Checkout nuttx repo
uses: actions/checkout@v3
with:
repository: apache/nuttx
repository: tiiuae/nuttx
path: nuttx
fetch-depth: 0

Expand Down
2 changes: 2 additions & 0 deletions arch/arm/src/stm32f7/stm32_ethernet.c
Original file line number Diff line number Diff line change
Expand Up @@ -3136,7 +3136,9 @@ static inline int stm32_dm9161(struct stm32_ethmac_s *priv)

static int stm32_phyinit(struct stm32_ethmac_s *priv)
{
#ifdef CONFIG_STM32F7_AUTONEG
volatile uint32_t timeout;
#endif
uint32_t regval;
uint16_t phyval;
int ret;
Expand Down
24 changes: 0 additions & 24 deletions arch/risc-v/Kconfig
Original file line number Diff line number Diff line change
Expand Up @@ -149,7 +149,6 @@ config ARCH_CHIP_MPFS
select ARCH_HAVE_SPI_CS_CONTROL
select ARCH_HAVE_PWM_MULTICHAN
select ARCH_HAVE_S_MODE
select PMP_HAS_LIMITED_FEATURES
select ONESHOT
select ALARM_ARCH
---help---
Expand Down Expand Up @@ -321,29 +320,6 @@ config ARCH_USE_S_MODE
and/or U-mode (in case of separate kernel-/userspaces). This provides
an option to run the kernel in S-mode, if the target supports it.

# MPU has certain architecture dependent configurations, which are presented
# here. Default is that the full RISC-V PMP specification is supported.

config PMP_HAS_LIMITED_FEATURES
bool
default n

config ARCH_MPU_MIN_BLOCK_SIZE
int "Minimum MPU (PMP) block size"
default 4 if !PMP_HAS_LIMITED_FEATURES

config ARCH_MPU_HAS_TOR
bool "PMP supports TOR"
default y if !PMP_HAS_LIMITED_FEATURES

config ARCH_MPU_HAS_NO4
bool "PMP supports NO4"
default y if !PMP_HAS_LIMITED_FEATURES

config ARCH_MPU_HAS_NAPOT
bool "PMP supports NAPOT"
default y if !PMP_HAS_LIMITED_FEATURES

choice
prompt "Toolchain Selection"
default RISCV_TOOLCHAIN_GNU_RV64
Expand Down
17 changes: 12 additions & 5 deletions arch/risc-v/src/common/Toolchain.defs
Original file line number Diff line number Diff line change
Expand Up @@ -133,12 +133,17 @@ endif

ifeq ($(CONFIG_RISCV_TOOLCHAIN),GNU_RVG)

# Generic GNU RVG toolchain
# Generic GNU RVG toolchain, prefer to use riscv-none-elf-gcc from xPack
# if CROSSDEV is not defined.

ifeq ($(CONFIG_RISCV_TOOLCHAIN_GNU_RV32),y)
CROSSDEV ?= riscv32-unknown-elf-
ifeq ($(shell riscv-none-elf-gcc --version > /dev/null 2>&1; echo $$?), 0)
CROSSDEV ?= riscv-none-elf-
else
CROSSDEV ?= riscv64-unknown-elf-
ifeq ($(CONFIG_RISCV_TOOLCHAIN_GNU_RV32),y)
CROSSDEV ?= riscv32-unknown-elf-
else
CROSSDEV ?= riscv64-unknown-elf-
endif
endif

# Detect cpu ISA support flags
Expand Down Expand Up @@ -178,12 +183,14 @@ ifeq ($(CONFIG_RISCV_TOOLCHAIN),GNU_RVG)
ARCHTYPE = rv64
ARCHABITYPE = lp64
LLVM_ARCHTYPE := riscv64
# https://www.sifive.com/blog/all-aboard-part-4-risc-v-code-models
ARCHCPUFLAGS = -mcmodel=medany
endif

# Construct arch flags

ARCHCPUEXTFLAGS = i$(ARCHRVISAM)$(ARCHRVISAA)$(ARCHRVISAF)$(ARCHRVISAD)$(ARCHRVISAC)$(ARCHRVISAZ)
ARCHCPUFLAGS = -march=$(ARCHTYPE)$(ARCHCPUEXTFLAGS)
ARCHCPUFLAGS += -march=$(ARCHTYPE)$(ARCHCPUEXTFLAGS)

# Construct arch abi flags

Expand Down
2 changes: 1 addition & 1 deletion arch/risc-v/src/common/addrenv.h
Original file line number Diff line number Diff line change
Expand Up @@ -58,7 +58,7 @@

/* User address environment end */

#define ARCH_ADDRENV_VEND (ARCH_ADDRENV_VBASE + ARCH_ADDRENV_MAX_SIZE)
#define ARCH_ADDRENV_VEND (ARCH_ADDRENV_VBASE + ARCH_ADDRENV_MAX_SIZE - 1)

/****************************************************************************
* Public Function Prototypes
Expand Down
10 changes: 9 additions & 1 deletion arch/risc-v/src/common/pgalloc.h
Original file line number Diff line number Diff line change
Expand Up @@ -75,6 +75,10 @@ static inline uintptr_t riscv_pgvaddr(uintptr_t paddr)
{
return paddr - CONFIG_ARCH_PGPOOL_PBASE + CONFIG_ARCH_PGPOOL_VBASE;
}
else if (paddr >= CONFIG_RAM_START && paddr < CONFIG_RAM_END)
{
return paddr - CONFIG_RAM_START + CONFIG_RAM_VSTART;
}

return 0;
}
Expand All @@ -95,7 +99,11 @@ static inline bool riscv_uservaddr(uintptr_t vaddr)
* heap, or stack regions.
*/

return vaddr >= ARCH_ADDRENV_VBASE && vaddr < ARCH_ADDRENV_VEND;
return ((vaddr >= ARCH_ADDRENV_VBASE && vaddr < ARCH_ADDRENV_VEND)
#ifdef CONFIG_ARCH_VMA_MAPPING
|| (vaddr >= CONFIG_ARCH_SHM_VBASE && vaddr < ARCH_SHM_VEND)
#endif
);
}

/****************************************************************************
Expand Down
31 changes: 17 additions & 14 deletions arch/risc-v/src/common/riscv_addrenv.c
Original file line number Diff line number Diff line change
Expand Up @@ -65,6 +65,7 @@
#include <nuttx/compiler.h>
#include <nuttx/irq.h>
#include <nuttx/pgalloc.h>
#include <nuttx/tls.h>

#include <arch/barriers.h>

Expand Down Expand Up @@ -421,6 +422,12 @@ int up_addrenv_create(size_t textsize, size_t datasize, size_t heapsize,

heapsize = heapsize + MM_PGALIGNUP(CONFIG_DEFAULT_TASK_STACKSIZE);

#ifdef CONFIG_TLS_ALIGNED
/* Need more stack for TLS alignment */

heapsize += MM_PGALIGNUP(2 * TLS_MAXSTACK);
#endif

/* Map the reserved area */

ret = create_region(addrenv, resvbase, resvsize, MMU_UDATA_FLAGS);
Expand Down Expand Up @@ -535,28 +542,24 @@ int up_addrenv_destroy(arch_addrenv_t *addrenv)
{
for (i = 0; i < ENTRIES_PER_PGT; i++, vaddr += pgsize)
{
if (vaddr_is_shm(vaddr))
{
/* Do not free memory from SHM area */

continue;
}

ptlast = (uintptr_t *)riscv_pgvaddr(mmu_pte_to_paddr(ptprev[i]));
if (ptlast)
{
/* Page table allocated, free any allocated memory */

for (j = 0; j < ENTRIES_PER_PGT; j++)
if (!vaddr_is_shm(vaddr))
{
paddr = mmu_pte_to_paddr(ptlast[j]);
if (paddr)
/* Free the allocated pages, but not from SHM area */

for (j = 0; j < ENTRIES_PER_PGT; j++)
{
mm_pgfree(paddr, 1);
paddr = mmu_pte_to_paddr(ptlast[j]);
if (paddr)
{
mm_pgfree(paddr, 1);
}
}
}

/* Then free the page table itself */
/* Regardless, free the page table itself */

mm_pgfree((uintptr_t)ptlast, 1);
}
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2 changes: 1 addition & 1 deletion arch/risc-v/src/common/riscv_addrenv_pgmap.c
Original file line number Diff line number Diff line change
Expand Up @@ -202,7 +202,7 @@ int up_addrenv_kmap_pages(void **pages, unsigned int npages, uintptr_t vaddr,
}

/****************************************************************************
* Name: riscv_unmap_pages
* Name: up_addrenv_kunmap_pages
*
* Description:
* Unmap a previously mapped virtual memory region.
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24 changes: 22 additions & 2 deletions arch/risc-v/src/common/riscv_addrenv_utils.c
Original file line number Diff line number Diff line change
Expand Up @@ -63,24 +63,44 @@ uintptr_t riscv_get_pgtable(arch_addrenv_t *addrenv, uintptr_t vaddr)
uintptr_t paddr;
uintptr_t ptprev;
uint32_t ptlevel;
uint32_t flags;

/* Get the current level MAX_LEVELS-1 entry corresponding to this vaddr */

ptlevel = ARCH_SPGTS;
ptprev = riscv_pgvaddr(addrenv->spgtables[ARCH_SPGTS - 1]);
paddr = mmu_pte_to_paddr(mmu_ln_getentry(ptlevel, ptprev, vaddr));
if (!ptprev)
{
/* Something is very wrong */

return 0;
}

/* Find the physical address of the final level page table */

paddr = mmu_pte_to_paddr(mmu_ln_getentry(ptlevel, ptprev, vaddr));
if (!paddr)
{
/* No page table has been allocated... allocate one now */

paddr = mm_pgalloc(1);
if (paddr)
{
/* Determine page table flags */

if (riscv_uservaddr(vaddr))
{
flags = MMU_UPGT_FLAGS;
}
else
{
flags = MMU_KPGT_FLAGS;
}

/* Wipe the page and assign it */

riscv_pgwipe(paddr);
mmu_ln_setentry(ptlevel, ptprev, paddr, vaddr, MMU_UPGT_FLAGS);
mmu_ln_setentry(ptlevel, ptprev, paddr, vaddr, flags);
}
}

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4 changes: 4 additions & 0 deletions arch/risc-v/src/common/riscv_mmu.h
Original file line number Diff line number Diff line change
Expand Up @@ -59,6 +59,10 @@

#define MMU_IO_FLAGS (PTE_R | PTE_W | PTE_G)

/* Flags for kernel page tables */

#define MMU_KPGT_FLAGS (PTE_G)

/* Kernel FLASH and RAM are mapped globally */

#define MMU_KTEXT_FLAGS (PTE_R | PTE_X | PTE_G)
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