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Arm64 kernelmode #277

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merged 24 commits into from
Sep 12, 2024
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f54ddc7
arm64_sync_exc: Use temporaries x9/x10 instead of x0/x1
pussuw Aug 13, 2024
9f6c2f9
arm64/barriers.h: Generalize barrier macros
pussuw Aug 15, 2024
097f8b2
arm64: Initial implementation of CONFIG_BUILD_KERNEL
pussuw Aug 9, 2024
ea57681
arm64/qemu: Add knsh target for armv8a qemu board
pussuw Aug 15, 2024
f41582a
imx9_usdhc.c: Fix build error when CONFIG_ARM64_DCACHE_DISABLE=y
pussuw Aug 29, 2024
b129c9c
arm64/imx9: Force 64-bit ELF format
pussuw Aug 26, 2024
495453a
arm64_checkstack.c: Fix traversing of user stack when ARCH_ADDRENV=Y
pussuw Aug 26, 2024
7d75861
arch/arm64: Move ELF_64BIT selection to arch/Kconfig
pussuw Sep 4, 2024
a2fcbe1
arch/arm64: make sure regs_context is aligned to 16
XuNeo May 16, 2024
7c5ca60
arch/arm64: add DSB ISB where necessary
XuNeo May 23, 2024
2d7bb51
arm64_mmu: Add data synchronization barrier after page tables are wri…
pussuw Mar 19, 2024
5b6c5fc
[REVERTME] arm64_addrenc.c: Add more heap, if TLS_ALIGNED is set
pussuw Aug 26, 2024
ddff6a6
arm64_vector_table.S: Remove unnecessary instruction
pussuw Sep 4, 2024
e8145dd
arm64_addrenv.c: Flush kernel page table copy to user mappings
pussuw Sep 4, 2024
0f74990
arm64_mmu: Do not set accessed-flag for table descriptors
pussuw Aug 29, 2024
cc148b0
arm64_mmu: Fix TLBI instruction format
pussuw Aug 29, 2024
8df8ed3
arm64_mmu.c: Fix kernel L1 page table size
pussuw Sep 4, 2024
79a8c60
arm64_mmu.h: Change ordering of access flags for user data
pussuw Sep 4, 2024
77f0337
arm64_addrenv_pgmap.c: Revoke user execution access to kernel mmap'd …
pussuw Sep 4, 2024
914004a
arm64_syscall.c: Don't need to set register context during syscall
pussuw Sep 6, 2024
46a11c7
arm64/crt0.c: Fix stack alignment when executing signal trampoline
pussuw Sep 4, 2024
648c25d
arm64/irq: Add mask for DAIF and SPSR DAIF bits
pussuw Sep 6, 2024
a6b43e6
arm64/syscall: (Re-)enable interrupts only if they were previously en…
pussuw Sep 6, 2024
33c1cdb
arm64/task/pthread_start: Fix rare issue with context register location
pussuw Sep 10, 2024
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10 changes: 10 additions & 0 deletions Documentation/platforms/arm64/qemu/boards/qemu-armv8a/README.txt
Original file line number Diff line number Diff line change
Expand Up @@ -148,6 +148,16 @@ Getting Started
-device virtio-net-device,netdev=u1,bus=virtio-mmio-bus.0 \
-mon chardev=con,mode=readline -kernel ./nuttx

3.5 Single Core /w kernel mode (GICv3)
Configuring NuttX and compile:
$ ./tools/configure.sh -l qemu-armv8a:knsh
$ make
Running with qemu
$ qemu-system-aarch64 -semihosting -cpu cortex-a53 -nographic \
-machine virt,virtualization=on,gic-version=3 \
-net none -chardev stdio,id=con,mux=on -serial chardev:con \
-mon chardev=con,mode=readline -kernel ./nuttx

Status
======

Expand Down
1 change: 1 addition & 0 deletions arch/Kconfig
Original file line number Diff line number Diff line change
Expand Up @@ -38,6 +38,7 @@ config ARCH_ARM64
select ARCH_HAVE_THREAD_LOCAL
select ARCH_HAVE_PERF_EVENTS
select ONESHOT
select LIBC_ARCH_ELF_64BIT if LIBC_ARCH_ELF
---help---
The ARM64 architectures

Expand Down
2 changes: 0 additions & 2 deletions arch/arm64/Kconfig
Original file line number Diff line number Diff line change
Expand Up @@ -56,7 +56,6 @@ config ARCH_CHIP_QEMU
select ARCH_HAVE_POWEROFF
select ARCH_HAVE_RESET
select ARCH_HAVE_TEXT_HEAP
select LIBC_ARCH_ELF_64BIT if LIBC_ARCH_ELF
---help---
QEMU virt platform (ARMv8a)

Expand All @@ -71,7 +70,6 @@ config ARCH_CHIP_GOLDFISH
select ARCH_HAVE_POWEROFF
select ARCH_HAVE_RESET
select ARCH_NEED_ADDRENV_MAPPING
select LIBC_ARCH_ELF_64BIT if LIBC_ARCH_ELF
---help---
Android GoldFish platform for NuttX (ARMv8a),
based on ARM virt board
Expand Down
62 changes: 36 additions & 26 deletions arch/arm64/include/arch.h
Original file line number Diff line number Diff line change
Expand Up @@ -33,8 +33,7 @@

#ifndef __ASSEMBLY__
# include <stdint.h>
# include <nuttx/pgalloc.h>
# include <nuttx/addrenv.h>
# include <stddef.h>
#endif

/****************************************************************************
Expand All @@ -46,6 +45,11 @@
# error Only pages sizes of 4096 are currently supported (CONFIG_ARCH_ADDRENV)
#endif

/* All implementations have 3 levels of page tables */

#define ARCH_PGT_MAX_LEVELS (3)
#define ARCH_SPGTS (ARCH_PGT_MAX_LEVELS - 1)

#endif /* CONFIG_ARCH_ADDRENV */

/****************************************************************************
Expand All @@ -57,40 +61,46 @@
****************************************************************************/

#ifdef CONFIG_ARCH_ADDRENV
/* The task group resources are retained in a single structure, task_group_s
* that is defined in the header file nuttx/include/nuttx/sched.h. The type
* arch_addrenv_t must be defined by platform specific logic in
* nuttx/arch/<architecture>/include/arch.h.
#ifndef __ASSEMBLY__

/* A task group must have its L1 table in memory always, and the rest can
* be dynamically committed to memory (and even swapped).
*
* These tables would hold the physical address of the level 2 page tables.
* All would be initially NULL and would not be backed up with physical
* memory until mappings in the level 2 page table are required.
* In this implementation level tables except the final level N are always
* kept in static memory, while the level N tables are always dynamically
* allocated. There is one static page per level in `spgtables[]`.
*
* For the VMSAv8-64 address translation system this means that:
* - A task can not have more than 1GB of memory allocated. This should be
* plenty enough...
* - The minimum amount of memory needed for page tables per task is 12K,
* which gives access to 2MB of memory. This is plenty for many tasks.
*/

struct arch_addrenv_s
{
/* Level 1 page table entries for each group section */

uintptr_t *text[ARCH_TEXT_NSECTS];
uintptr_t *data[ARCH_DATA_NSECTS];
#ifdef CONFIG_BUILD_KERNEL
uintptr_t *heap[ARCH_HEAP_NSECTS];
#ifdef CONFIG_ARCH_VMA_MAPPING
uintptr_t *shm[ARCH_SHM_NSECTS];
#endif

/* Initial heap allocation (in bytes). This exists only provide an
* indirect path for passing the size of the initial heap to the heap
* initialization logic. These operations are separated in time and
* architecture. REVISIT: I would like a better way to do this.
/* Physical addresses of the static page tables (levels N-1) here, these
* are allocated when a task is created.
*/

size_t heapsize;
#endif
uintptr_t spgtables[ARCH_SPGTS];

/* The text, data, heap bases and heap size here */

uintptr_t textvbase;
uintptr_t datavbase;
uintptr_t heapvbase;
size_t heapsize;

/* The page directory root (ttbr0) value */

uintptr_t ttbr0;
};

typedef struct arch_addrenv_s arch_addrenv_t;
#endif

#endif /* __ASSEMBLY__ */
#endif /* CONFIG_ARCH_ADDRENV */

/****************************************************************************
* Public Data
Expand Down
36 changes: 23 additions & 13 deletions arch/arm64/include/irq.h
Original file line number Diff line number Diff line change
Expand Up @@ -192,6 +192,14 @@
#define XCPTCONTEXT_REGS (XCPTCONTEXT_GP_REGS + XCPTCONTEXT_FPU_REGS)
#define XCPTCONTEXT_SIZE (8 * XCPTCONTEXT_REGS)

#ifdef CONFIG_ARM64_DECODEFIQ
# define IRQ_DAIF_MASK (3)
#else
# define IRQ_DAIF_MASK (2)
#endif

#define IRQ_SPSR_MASK (IRQ_DAIF_MASK << 6)

#ifndef __ASSEMBLY__

#ifdef __cplusplus
Expand Down Expand Up @@ -219,6 +227,12 @@ extern "C"
EXTERN volatile uint64_t *g_current_regs[CONFIG_SMP_NCPUS];
#define CURRENT_REGS (g_current_regs[up_cpu_index()])

/****************************************************************************
* Public Types
****************************************************************************/

#ifndef __ASSEMBLY__

struct xcptcontext
{
/* The following function pointer is non-zero if there are pending signals
Expand All @@ -238,6 +252,9 @@ struct xcptcontext
/* task stack reg context */

uint64_t *regs;
#ifndef CONFIG_BUILD_FLAT
uint64_t *initregs;
#endif

/* task context, for signal process */

Expand Down Expand Up @@ -280,11 +297,12 @@ struct xcptcontext

uintptr_t *ustkptr; /* Saved user stack pointer */
uintptr_t *kstack; /* Allocate base of the (aligned) kernel stack */
uintptr_t *kstkptr; /* Saved kernel stack pointer */
# endif
#endif
};

#endif /* __ASSEMBLY__ */

/* Name: up_irq_save, up_irq_restore, and friends.
*
* NOTE: This function should never be called from application code and,
Expand Down Expand Up @@ -314,13 +332,9 @@ static inline irqstate_t up_irq_save(void)
__asm__ __volatile__
(
"mrs %0, daif\n"
#ifdef CONFIG_ARM64_DECODEFIQ
"msr daifset, #3\n"
#else
"msr daifset, #2\n"
#endif
"msr daifset, %1\n"
: "=r" (flags)
:
: "i" (IRQ_DAIF_MASK)
: "memory"
);

Expand All @@ -336,13 +350,9 @@ static inline irqstate_t up_irq_enable(void)
__asm__ __volatile__
(
"mrs %0, daif\n"
#ifdef CONFIG_ARM64_DECODEFIQ
"msr daifclr, #3\n"
#else
"msr daifclr, #2\n"
#endif
"msr daifclr, %1\n"
: "=r" (flags)
:
: "i" (IRQ_DAIF_MASK)
: "memory"
);
return flags;
Expand Down
31 changes: 3 additions & 28 deletions arch/arm64/include/syscall.h
Original file line number Diff line number Diff line change
Expand Up @@ -52,7 +52,7 @@
*/

#ifndef CONFIG_BUILD_FLAT
# define CONFIG_SYS_RESERVED 8
# define CONFIG_SYS_RESERVED 6
#else
# define CONFIG_SYS_RESERVED 4
#endif
Expand Down Expand Up @@ -80,32 +80,7 @@

#define SYS_switch_context (2)

#ifdef CONFIG_LIB_SYSCALL
/* SYS call 3:
*
* void arm_syscall_return(void);
*/

#define SYS_syscall_return (3)
#endif /* CONFIG_LIB_SYSCALL */

#ifndef CONFIG_BUILD_FLAT
/* SYS call 4:
*
* void up_task_start(main_t taskentry, int argc, char *argv[])
* noreturn_function;
*/

#define SYS_task_start (4)

/* SYS call 5:
*
* void up_pthread_start((pthread_startroutine_t startup,
* pthread_startroutine_t entrypt, pthread_addr_t arg)
* noreturn_function
*/

#define SYS_pthread_start (5)

/* SYS call 6:
*
Expand All @@ -114,14 +89,14 @@
* void *ucontext);
*/

#define SYS_signal_handler (6)
#define SYS_signal_handler (4)

/* SYS call 7:
*
* void signal_handler_return(void);
*/

#define SYS_signal_handler_return (7)
#define SYS_signal_handler_return (5)
#endif /* !CONFIG_BUILD_FLAT */

#define ARM_SMCC_RES_A0 (0)
Expand Down
18 changes: 5 additions & 13 deletions arch/arm64/src/common/Make.defs
Original file line number Diff line number Diff line change
Expand Up @@ -88,23 +88,15 @@ ifeq ($(CONFIG_BUILD_KERNEL),y)
CMN_CSRCS += arm64_task_start.c arm64_pthread_start.c arm64_signal_dispatch.c
endif

ifeq ($(CONFIG_ARCH_ADDRENV),y)
CMN_CSRCS += arm64_addrenv.c arm64_addrenv_utils.c arm64_pgalloc.c
ifeq ($(CONFIG_ARCH_STACK_DYNAMIC),y)
CMN_CSRCS += arm64_addrenv_ustack.c
endif
ifeq ($(CONFIG_ARCH_KERNEL_STACK),y)
CMN_CSRCS += arm64_addrenv_kstack.c
endif
ifeq ($(CONFIG_ARCH_VMA_MAPPING),y)
CMN_CSRCS += arm64_addrenv_shm.c
endif
endif

ifeq ($(CONFIG_MM_PGALLOC),y)
CMN_CSRCS += arm64_physpgaddr.c
ifeq ($(CONFIG_ARCH_PGPOOL_MAPPING),y)
CMN_CSRCS += arm64_virtpgaddr.c
ifeq ($(CONFIG_ARCH_ADDRENV),y)
CMN_CSRCS += arm64_addrenv.c arm64_pgalloc.c arm64_addrenv_perms.c
CMN_CSRCS += arm64_addrenv_utils.c arm64_addrenv_shm.c arm64_addrenv_pgmap.c
ifeq ($(CONFIG_ARCH_STACK_DYNAMIC),y)
CMN_CSRCS += arm64_addrenv_ustack.c
endif
endif

Expand Down
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