arm64/kernel mode: Pull fixes for 48-bit VA from upstream #283
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The VMSAv8-64 translation system has 4 page table levels in total, ranging from 0-3. The address environment code assumes only 3 levels, from 1-3 but this is wrong; the amount of levels _utilized_ depends on the configured VA size CONFIG_ARM64_VA_BITS. With <= 39 bits 3 levels is enough, while if the va range is larger, the 4th translation table level is taken into use dynamically by shifting the base translation table level. From arm64_mmu.c, where va_bits is the amount of va bits used in address translations: (va_bits <= 21) - base level 3 (22 <= va_bits <= 30) - base level 2 (31 <= va_bits <= 39) - base level 1 (40 <= va_bits <= 48) - base level 0 The base level is what is configured as the page directory root. This also affects the performance of address translations i.e. if the VA range is smaller, address translations are also faster as the page table walk is shorter.
The original code made the incorrect assumption that the amount of translation levels is 3, but this is incorrect. The amount of levels is 4 and the amount of levels that are utilized / in use is set dynamically from the amount of VA bits in use.
The aforementioned functions can/will fail if the C compiler decides to use the stack for the incoming entrypt/etc. parameters. Fix this issue by converting the jump to user part into pure assembly, ensuring the stack is NOT used for the parameters.
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jlaitine
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Sep 23, 2024
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Testing