RISC V examples

tutorials/08-RISCV/.gitignore

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+*.elf
+*.hex
+*.bin
+*.json
+*_out.config
+*.bit
+*.vvp
+*.vcd

tutorials/08-RISCV/01-Blinky/Makefile

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+all: firmware.hex
+
+clean:
+	rm -f firmware.hex firmware.elf
+
+firmware.elf: sections.lds firmware.s
+	riscv64-unknown-elf-gcc -mabi=ilp32 -march=rv32i -Wl,-Bstatic,-T,sections.lds,--strip-debug -ffreestanding -nostdlib -o firmware.elf firmware.s
+
+firmware.hex: firmware.elf
+	riscv64-unknown-elf-objcopy -O verilog firmware.elf /dev/stdout > firmware.hex
+
+.PHONY: clean

tutorials/08-RISCV/01-Blinky/apio.ini

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+../../apio.ini

tutorials/08-RISCV/01-Blinky/attosoc.v

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+/*
+ *  ECP5 PicoRV32 demo
+ *
+ *  Copyright (C) 2017  Clifford Wolf <[email protected]>
+ *  Copyright (C) 2018  David Shah <[email protected]>
+ *
+ *  Permission to use, copy, modify, and/or distribute this software for any
+ *  purpose with or without fee is hereby granted, provided that the above
+ *  copyright notice and this permission notice appear in all copies.
+ *
+ *  THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ *  WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ *  MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ *  ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ *  WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ *  ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ *  OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ *
+ */
+
+`ifdef PICORV32_V
+`error "attosoc.v must be read before picorv32.v!"
+`endif
+
+`define PICORV32_REGS picosoc_regs
+
+module attosoc (
+	input clk,
+	output reg [7:0] led
+);
+
+	reg [5:0] reset_cnt = 0;
+	wire resetn = &reset_cnt;
+
+	always @(posedge clk) begin
+		reset_cnt <= reset_cnt + !resetn;
+	end
+
+	parameter integer MEM_WORDS = 256;
+	parameter [31:0] STACKADDR = (4*MEM_WORDS);       // end of memory
+	parameter [31:0] PROGADDR_RESET = 32'h 0000_0000; // ROM at 0x0
+	parameter integer ROM_BYTES = 256;
+
+	reg [7:0] rom [0:ROM_BYTES-1];
+	wire [31:0] rom_rdata = {rom[mem_addr+3], rom[mem_addr+2], rom[mem_addr+1], rom[mem_addr+0]};
+	initial $readmemh("firmware.hex", rom);
+
+	wire mem_valid;
+	wire mem_instr;
+	wire mem_ready;
+	wire [31:0] mem_addr;
+	wire [31:0] mem_wdata;
+	wire [3:0] mem_wstrb;
+	wire [31:0] mem_rdata;
+
+    wire rom_ready = mem_valid && mem_addr[31:24] == 8'h00;
+
+	wire iomem_valid;
+	wire iomem_ready;
+	wire [31:0] iomem_addr;
+	wire [31:0] iomem_wdata;
+	wire [3:0] iomem_wstrb;
+	wire [31:0] iomem_rdata;
+
+	assign iomem_valid = mem_valid && (mem_addr[31:24] > 8'h 01);
+	assign iomem_ready = 1'b1;
+	assign iomem_wstrb = mem_wstrb;
+	assign iomem_addr = mem_addr;
+	assign iomem_wdata = mem_wdata;
+
+	wire [31:0] spimemio_cfgreg_do;
+
+
+    always @(posedge clk)
+        if (iomem_valid && iomem_wstrb[0])
+            led <= iomem_wdata[7:0];
+
+	assign mem_ready = (iomem_valid && iomem_ready) || rom_ready;
+
+	assign mem_rdata = rom_rdata;
+
+	picorv32 #(
+		.STACKADDR(STACKADDR),
+		.PROGADDR_RESET(PROGADDR_RESET),
+		.PROGADDR_IRQ(32'h 0000_0000),
+		.BARREL_SHIFTER(0),
+		.COMPRESSED_ISA(0),
+		.ENABLE_MUL(0),
+		.ENABLE_DIV(0),
+		.ENABLE_IRQ(0),
+		.ENABLE_IRQ_QREGS(0)
+	) cpu (
+		.clk         (clk        ),
+		.resetn      (resetn     ),
+		.mem_valid   (mem_valid  ),
+		.mem_instr   (mem_instr  ),
+		.mem_ready   (mem_ready  ),
+		.mem_addr    (mem_addr   ),
+		.mem_wdata   (mem_wdata  ),
+		.mem_wstrb   (mem_wstrb  ),
+		.mem_rdata   (mem_rdata  )
+	);
+
+
+
+endmodule
+
+// Implementation note:
+// Replace the following two modules with wrappers for your SRAM cells.
+
+module picosoc_regs (
+	input clk, wen,
+	input [5:0] waddr,
+	input [5:0] raddr1,
+	input [5:0] raddr2,
+	input [31:0] wdata,
+	output [31:0] rdata1,
+	output [31:0] rdata2
+);
+	reg [31:0] regs [0:31];
+
+	always @(posedge clk)
+		if (wen) regs[waddr[4:0]] <= wdata;
+
+	assign rdata1 = regs[raddr1[4:0]];
+	assign rdata2 = regs[raddr2[4:0]];
+endmodule

tutorials/08-RISCV/01-Blinky/firmware.s

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+start:
+    li s0, 2
+    li s1, 0x02000000
+    li s3, 256
+outerloop:
+    addi s0, s0, 1
+    blt s0, s3, inrange
+    li s0, 2
+inrange:
+    li s2, 2
+innerloop:
+    bge s2, s0, prime
+    add a0, s0, 0
+    add a1, s2, 0
+    jal ra, divtest
+    beq a0, x0, notprime
+    addi s2, s2, 1
+    j innerloop
+prime:
+    sw s0, 0(s1)
+    jal ra, delay
+notprime:
+    j outerloop
+
+divtest: 
+    li t0, 1
+divloop:
+    sub a0, a0, a1
+    bge a0, t0, divloop
+    jr ra
+
+delay:
+    li t0, 360000
+delayloop:
+    addi t0, t0, -1
+    bnez t0, delayloop
+    jr ra

tutorials/08-RISCV/01-Blinky/picorv32.v

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+../picorv32.v

tutorials/08-RISCV/01-Blinky/sections.lds

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+/*
+This is free and unencumbered software released into the public domain.
+
+Anyone is free to copy, modify, publish, use, compile, sell, or
+distribute this software, either in source code form or as a compiled
+binary, for any purpose, commercial or non-commercial, and by any
+means.
+*/
+
+MEMORY {
+	/* the memory in the testbench is 64k in size;
+	 * set LENGTH=48k and leave at least 16k for stack */
+	mem : ORIGIN = 0x00000000, LENGTH = 0x0000c000
+}
+
+SECTIONS {
+	.memory : {
+		. = 0x000000;
+		start*(.text);
+		*(.text);
+		*(*);
+		end = .;
+	} > mem
+}

tutorials/08-RISCV/01-Blinky/top.v

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+module top(
+	input clk_25mhz,
+	output [7:0] led,
+	output wifi_gpio0
+);
+
+assign wifi_gpio0 = 1'b1;
+
+attosoc soc(
+	.clk(clk_25mhz),
+	.led(led)
+);
+
+endmodule

tutorials/08-RISCV/01-Blinky/ulx3s.lpf

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+../../ulx3s.lpf

tutorials/08-RISCV/02-Console/Makefile

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+all: firmware.hex
+
+clean:
+	rm -f firmware.hex firmware.elf firmware.bin
+
+firmware.elf: sections.lds start.s firmware.c
+	riscv64-unknown-elf-gcc -mabi=ilp32 -march=rv32i -Wl,-Bstatic,-T,sections.lds,--strip-debug -ffreestanding -nostdlib -o firmware.elf start.s firmware.c
+
+firmware.bin: firmware.elf
+	riscv64-unknown-elf-objcopy -O binary firmware.elf /dev/stdout > firmware.bin
+
+firmware.hex: firmware.bin
+	python3 makehex.py $^ 8192 > $@
+

tutorials/08-RISCV/02-Console/apio.ini

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+../../apio.ini

tutorials/08-RISCV/02-Console/attosoc.v

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+../attosoc.v

tutorials/08-RISCV/02-Console/firmware.c

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+#include <stdint.h>
+
+#define LED (*(volatile uint32_t*)0x02000000)
+
+#define reg_uart_clkdiv (*(volatile uint32_t*)0x02000004)
+#define reg_uart_data (*(volatile uint32_t*)0x02000008)
+
+void putchar(char c)
+{
+    if (c == '\n')
+        putchar('\r');
+    reg_uart_data = c;
+}
+
+void print(const char *p)
+{
+    while (*p)
+        putchar(*(p++));
+}
+
+void delay() {
+    for (volatile int i = 0; i < 25000; i++)
+        ;
+}
+
+char getchar_prompt(char *prompt)
+{
+	int32_t c = -1;
+
+	uint32_t cycles_begin, cycles_now, cycles;
+	__asm__ volatile ("rdcycle %0" : "=r"(cycles_begin));
+
+	if (prompt)
+		print(prompt);
+
+	while (c == -1) {
+		__asm__ volatile ("rdcycle %0" : "=r"(cycles_now));
+		cycles = cycles_now - cycles_begin;
+		if (cycles > 12000000) {
+			if (prompt)
+				print(prompt);
+			cycles_begin = cycles_now;
+		}
+		c = reg_uart_data;
+	}
+	return c;
+}
+
+int main() {
+    // 9600 baud at 50MHz
+    reg_uart_clkdiv = 1302;
+	while (getchar_prompt("Press ENTER to continue..\n") != '\r') { /* wait */ }
+
+	print("\n");
+	print("  ____  _          ____         ____\n");
+	print(" |  _ \\(_) ___ ___/ ___|  ___  / ___|\n");
+	print(" | |_) | |/ __/ _ \\___ \\ / _ \\| |\n");
+	print(" |  __/| | (_| (_) |__) | (_) | |___\n");
+	print(" |_|   |_|\\___\\___/____/ \\___/ \\____|\n");
+	print("\n");
+	print("Blinking leds demo....\n");
+    while (1) {
+        LED = 0xFF;
+        delay();
+		delay();
+		delay();		
+        LED = 0x00;
+        delay();
+		delay();
+		delay();		
+    }
+}

tutorials/08-RISCV/02-Console/makehex.py

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+#!/usr/bin/env python3
+#
+# This is free and unencumbered software released into the public domain.
+#
+# Anyone is free to copy, modify, publish, use, compile, sell, or
+# distribute this software, either in source code form or as a compiled
+# binary, for any purpose, commercial or non-commercial, and by any
+# means.
+
+from sys import argv
+
+binfile = argv[1]
+nwords = int(argv[2])
+
+with open(binfile, "rb") as f:
+    bindata = f.read()
+
+assert len(bindata) < 4*nwords
+#assert len(bindata) % 4 == 0
+
+for i in range(nwords):
+    if i < len(bindata) // 4:
+        w = bindata[4*i : 4*i+4]
+        print("%02x%02x%02x%02x" % (w[3], w[2], w[1], w[0]))
+    else:
+        print("0")
+

tutorials/08-RISCV/02-Console/picorv32.v

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+../picorv32.v

tutorials/08-RISCV/02-Console/pll.v

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+../pll.v

tutorials/08-RISCV/02-Console/sections.lds

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+/*
+This is free and unencumbered software released into the public domain.
+
+Anyone is free to copy, modify, publish, use, compile, sell, or
+distribute this software, either in source code form or as a compiled
+binary, for any purpose, commercial or non-commercial, and by any
+means.
+*/
+
+MEMORY {
+	/* the memory in the testbench is 64k in size;
+	 * set LENGTH=48k and leave at least 16k for stack */
+	mem : ORIGIN = 0x00000000, LENGTH = 0x0000c000
+}
+
+SECTIONS {
+	.memory : {
+		. = 0x000000;
+		start*(.text);
+		*(.text);
+		*(*);
+		end = .;
+	} > mem
+}

tutorials/08-RISCV/02-Console/simpleuart.v

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+../simpleuart.v