1541 parallel bus speedloader (#11)

README.md

@@ -10,7 +10,7 @@ Features:
 * PS/2 Keyboard
 * Joystick (Atari / Commodore digital type)<br>
 * Joystick emulation on Keyboard Numpad<br>
-* emulated 1541 Diskdrive on **raw** microSD card <br>
+* emulated 1541 Diskdrive on **raw** microSD card with Userport parallel bus Speedloader<br>
 
 <font color="red">Both PS/2 KEYBOAD AND digital JOYSTICK pinmaps aligned to match</font> [MiSTeryNano project](https://github.com/harbaum/MiSTeryNano). Didn't tested yet but the described USB Keyboard to PS/2 converter based on [M0S Dock](https://wiki.sipeed.com/hardware/en/maixzero/m0s/m0s.html) should work too.
 
@@ -22,7 +22,7 @@ Dedicated .fs bitstream for default configuration and .fs for cartridge ROM demo
 Working on e.g. BENQ GL2450HM (FHD) , Acer VN247 (FHD), Dell S2721DGF (2k), LG 27UP85NP (4K). Check [EDID](https://en.wikipedia.org/wiki/Extended_Display_Identification_Data) timing of your target display for support. [Monitor Asset Manager](http://www.entechtaiwan.com/util/moninfo.shtm) might help to figure out.<br>
 
 ## emulated Diskdrive 1541
-Emulated 1541 on a raw microSD card (no FAT fs !)<br>
+Emulated 1541 on a raw microSD card (no FAT fs !) including parallel bus Speedloader<br>
 Place one or more [.D64](https://vice-emu.sourceforge.io/vice_toc.html#TOC405) file in the tools folder and run 'create_C64_ALL_D64.bat'. It will create a DISKSRAWC64.IMG.<br> Use e.g. [win32diskimager](https://sourceforge.net/projects/win32diskimager/) to program a microSD card with DISKSRAWC64.IMG. BE CAREFUL NOT WRITING ON YOUR OWN HARDDRIVE! Insert card in TN slot.<br>
 LED 1 is the Drive activity indicator.<br> For those who forgot after all those years...<br>
 Disk directory listing:<br>

src/c1541/c1541_logic.vhd

@@ -2,9 +2,6 @@ library IEEE;
 use IEEE.STD_LOGIC_1164.ALL;
 use IEEE.numeric_std.all;
 
---use work.platform_pkg.all;
---use work.project_pkg.all;
-
 --
 -- Model 1541B
 --
@@ -26,8 +23,14 @@ entity c1541_logic is
     sb_clk_in       : in std_logic;
     sb_atn_oe       : out std_logic;
     sb_atn_in       : in std_logic;
-
-    -- drive-side interface
+
+    -- parallel bus
+    par_data_i      : in std_logic_vector(7 downto 0);
+    par_stb_i       : in std_logic;
+    par_data_o      : out std_logic_vector(7 downto 0);
+    par_stb_o       : out std_logic;
+
+  -- drive-side interface
     ds              : in std_logic_vector(1 downto 0);    -- device select
     di              : in std_logic_vector(7 downto 0);    -- disk read data
     do              : out std_logic_vector(7 downto 0);   -- disk data to write
@@ -121,7 +124,15 @@ architecture SYN of c1541_logic is
   signal uc3_pb_oe      : std_logic_vector(7 downto 0);
 
   signal cpu_a_slice    : std_logic_vector(3 downto 0);
-begin
+
+  signal uc1_ca2_o      : std_logic;
+  signal uc1_ca2_oe     : std_logic;
+  signal uc1_cb1_o      : std_logic;
+  signal uc1_cb1_oe     : std_logic;
+  signal cb1_i          : std_logic;
+
+
+  begin
 
   reset_n <= not reset;
 
@@ -162,15 +173,16 @@ begin
 
   --
   -- hook up UC1 ports
-  --
-
   uc1_cs1 <= '1';
   --uc1_cs2_n: see decode logic above
   -- CA1
   uc1_ca1_i <= not sb_atn_in;
+
   -- PA
-  uc1_pa_i(0) <= (uc1_pa_o(0) or uc1_pa_oe_n(0)) and tr00_sense_n;
-  uc1_pa_i(7 downto 1) <= uc1_pa_oe_n(7 downto 1) or uc1_pa_o(7 downto 1);  -- NC, but reads output when set to output
+  par_stb_o  <= uc1_ca2_o or not uc1_ca2_oe;
+  par_data_o <= uc1_pa_o or not uc1_pa_oe; 
+  cb1_i      <= par_stb_i;
+  uc1_pa_i   <= par_data_i;
 
   -- PB
   uc1_pb_i(0) <=  not (sb_data_in and sb_data_oe);
@@ -300,10 +312,18 @@ begin
       port_b_t        => uc1_pb_oe,
       port_b_i        => uc1_pb_i,
 
+
       ca1_i           => uc1_ca1_i,
-      ca2_i           => '1',
+      ca2_i           => (uc1_ca2_o or not uc1_ca2_oe),
+
+
+      ca2_o           => uc1_ca2_o,
+      ca2_t           => uc1_ca2_oe,
+
+      cb1_i           => cb1_i,
+      cb1_o           => uc1_cb1_o,
+      cb1_t           => uc1_cb1_oe, 
 
-      cb1_i           => '1',
       cb2_i           => '1',
 
       irq             => uc1_irq

src/c1541/c1541_sd.vhd

@@ -48,10 +48,16 @@ port(
 	sd_mosi  : out std_logic;
 	sd_sclk  : out std_logic;
 
+	-- parallel bus
+	par_data_i : in std_logic_vector(7 downto 0);
+	par_stb_i  : in std_logic;
+	par_data_o : out std_logic_vector(7 downto 0);
+	par_stb_o  : out std_logic;
+
 	dbg_track_num_dbl : out std_logic_vector(6 downto 0);
 	dbg_sd_busy     : out std_logic;
 	dbg_sd_state    : out std_logic_vector(7 downto 0);
-    dbg_read_sector : out std_logic_vector(4 downto 0);
+	dbg_read_sector : out std_logic_vector(4 downto 0);
 	dbg_mtr         : out std_logic;
 	dbg_act         : out std_logic
 );
@@ -132,7 +138,13 @@ begin
     sb_data_in => iec_data_i,
     sb_clk_in  => iec_clk_i,
     sb_atn_in  => iec_atn_i,
-
+
+    -- parallel bus
+    par_data_i => par_data_i,
+    par_stb_i  => par_stb_i,
+    par_data_o => par_data_o,
+    par_stb_o  => par_stb_o,
+
     -- drive-side interface
     ds              => "00",     -- device select
     di              => c1541_logic_din,  -- data read