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Refactor entire JS API to work with bigints
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@xarantolus
xarantolus committed Dec 31, 2022
1 parent 9da0a57 commit 70fdacd
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Showing 20 changed files with 285 additions and 236 deletions.
44 changes: 22 additions & 22 deletions src/instructions/add.rs
View file
Original file line number Diff line number Diff line change
Expand Up @@ -1778,11 +1778,11 @@ mod tests {
write_reg_value!(d; a; EBX; 0x0);
write_reg_value!(q; a; RCX; 0x1000);
a.mem_init_zero(0x1000, 4).unwrap();
a.mem_write_32(0x1000, 0x80000000u32).unwrap();
a.mem_write_32(0x1000, 0x80000000u64).unwrap()
};
|a: Axecutor| {
assert_reg_value!(d; a; EBX; 0x80000000u32);
assert_eq!(a.mem_read_32(0x1000).unwrap(), 0x80000000u32);
assert_eq!(a.mem_read_32(0x1000).unwrap(), 0x80000000u64);
};
(FLAG_PF | FLAG_SF; FLAG_CF | FLAG_ZF | FLAG_OF)
];
Expand Down Expand Up @@ -1823,11 +1823,11 @@ mod tests {
write_reg_value!(d; a; EBX; 0x1);
write_reg_value!(q; a; RCX; 0x1000);
a.mem_init_zero(0x1000, 4).unwrap();
a.mem_write_32(0x1000, 0x7fffffffu32).unwrap();
a.mem_write_32(0x1000, 0x7fffffffu64).unwrap()
};
|a: Axecutor| {
assert_reg_value!(d; a; EBX; 0x80000000u32);
assert_eq!(a.mem_read_32(0x1000).unwrap(), 0x7fffffffu32);
assert_eq!(a.mem_read_32(0x1000).unwrap(), 0x7fffffffu64);
};
(FLAG_PF | FLAG_SF | FLAG_OF; FLAG_CF | FLAG_ZF)
];
Expand All @@ -1838,11 +1838,11 @@ mod tests {
write_reg_value!(d; a; EBX; 0x1);
write_reg_value!(q; a; RCX; 0x1000);
a.mem_init_zero(0x1000, 4).unwrap();
a.mem_write_32(0x1000, 0x80000000u32).unwrap();
a.mem_write_32(0x1000, 0x80000000u64).unwrap()
};
|a: Axecutor| {
assert_reg_value!(d; a; EBX; 0x80000001u32);
assert_eq!(a.mem_read_32(0x1000).unwrap(), 0x80000000u32);
assert_eq!(a.mem_read_32(0x1000).unwrap(), 0x80000000u64);
};
(FLAG_SF; FLAG_CF | FLAG_PF | FLAG_ZF | FLAG_OF)
];
Expand All @@ -1853,11 +1853,11 @@ mod tests {
write_reg_value!(d; a; EBX; 0x8);
write_reg_value!(q; a; RCX; 0x1000);
a.mem_init_zero(0x1000, 4).unwrap();
a.mem_write_32(0x1000, 0x7fffffffu32).unwrap();
a.mem_write_32(0x1000, 0x7fffffffu64).unwrap()
};
|a: Axecutor| {
assert_reg_value!(d; a; EBX; 0x80000007u32);
assert_eq!(a.mem_read_32(0x1000).unwrap(), 0x7fffffffu32);
assert_eq!(a.mem_read_32(0x1000).unwrap(), 0x7fffffffu64);
};
(FLAG_SF | FLAG_OF; FLAG_CF | FLAG_PF | FLAG_ZF)
];
Expand All @@ -1868,11 +1868,11 @@ mod tests {
write_reg_value!(d; a; EBX; 0x10);
write_reg_value!(q; a; RCX; 0x1000);
a.mem_init_zero(0x1000, 4).unwrap();
a.mem_write_32(0x1000, 0x7fffffffu32).unwrap();
a.mem_write_32(0x1000, 0x7fffffffu64).unwrap()
};
|a: Axecutor| {
assert_reg_value!(d; a; EBX; 0x8000000fu32);
assert_eq!(a.mem_read_32(0x1000).unwrap(), 0x7fffffffu32);
assert_eq!(a.mem_read_32(0x1000).unwrap(), 0x7fffffffu64);
};
(FLAG_PF | FLAG_SF | FLAG_OF; FLAG_CF | FLAG_ZF)
];
Expand All @@ -1883,11 +1883,11 @@ mod tests {
write_reg_value!(d; a; EBX; 0x20);
write_reg_value!(q; a; RCX; 0x1000);
a.mem_init_zero(0x1000, 4).unwrap();
a.mem_write_32(0x1000, 0x7fffffffu32).unwrap();
a.mem_write_32(0x1000, 0x7fffffffu64).unwrap()
};
|a: Axecutor| {
assert_reg_value!(d; a; EBX; 0x8000001fu32);
assert_eq!(a.mem_read_32(0x1000).unwrap(), 0x7fffffffu32);
assert_eq!(a.mem_read_32(0x1000).unwrap(), 0x7fffffffu64);
};
(FLAG_SF | FLAG_OF; FLAG_CF | FLAG_PF | FLAG_ZF)
];
Expand All @@ -1898,11 +1898,11 @@ mod tests {
write_reg_value!(d; a; EBX; 0x80000000u32);
write_reg_value!(q; a; RCX; 0x1000);
a.mem_init_zero(0x1000, 4).unwrap();
a.mem_write_32(0x1000, 0x80000000u32).unwrap();
a.mem_write_32(0x1000, 0x80000000u64).unwrap()
};
|a: Axecutor| {
assert_reg_value!(d; a; EBX; 0x0);
assert_eq!(a.mem_read_32(0x1000).unwrap(), 0x80000000u32);
assert_eq!(a.mem_read_32(0x1000).unwrap(), 0x80000000u64);
};
(FLAG_CF | FLAG_PF | FLAG_ZF | FLAG_OF; FLAG_SF)
];
Expand Down Expand Up @@ -3148,11 +3148,11 @@ mod tests {
|a: &mut Axecutor| {
write_reg_value!(q; a; RBX; 0x1000);
a.mem_init_zero(0x1000, 4).unwrap();
a.mem_write_32(0x1000, 0x7fffffffu32).unwrap();
a.mem_write_32(0x1000, 0x7fffffffu64).unwrap()
};
|a: Axecutor| {
assert_reg_value!(q; a; RBX; 0x1000);
assert_eq!(a.mem_read_32(0x1000).unwrap(), 0x800000feu32);
assert_eq!(a.mem_read_32(0x1000).unwrap(), 0x800000feu64);
};
(FLAG_SF | FLAG_OF; FLAG_CF | FLAG_PF | FLAG_ZF)
];
Expand All @@ -3162,11 +3162,11 @@ mod tests {
|a: &mut Axecutor| {
write_reg_value!(q; a; RBX; 0x1000);
a.mem_init_zero(0x1000, 4).unwrap();
a.mem_write_32(0x1000, 0x80000000u32).unwrap();
a.mem_write_32(0x1000, 0x80000000u64).unwrap()
};
|a: Axecutor| {
assert_reg_value!(q; a; RBX; 0x1000);
assert_eq!(a.mem_read_32(0x1000).unwrap(), 0x800000ffu32);
assert_eq!(a.mem_read_32(0x1000).unwrap(), 0x800000ffu64);
};
(FLAG_PF | FLAG_SF; FLAG_CF | FLAG_ZF | FLAG_OF)
];
Expand Down Expand Up @@ -3232,11 +3232,11 @@ mod tests {
|a: &mut Axecutor| {
write_reg_value!(q; a; RBX; 0x1000);
a.mem_init_zero(0x1000, 4).unwrap();
a.mem_write_32(0x1000, 0x7fffffffu32).unwrap();
a.mem_write_32(0x1000, 0x7fffffffu64).unwrap()
};
|a: Axecutor| {
assert_reg_value!(q; a; RBX; 0x1000);
assert_eq!(a.mem_read_32(0x1000).unwrap(), 0x80000002u32);
assert_eq!(a.mem_read_32(0x1000).unwrap(), 0x80000002u64);
};
(FLAG_SF | FLAG_OF; FLAG_CF | FLAG_PF | FLAG_ZF)
];
Expand All @@ -3246,11 +3246,11 @@ mod tests {
|a: &mut Axecutor| {
write_reg_value!(q; a; RBX; 0x1000);
a.mem_init_zero(0x1000, 4).unwrap();
a.mem_write_32(0x1000, 0x80000000u32).unwrap();
a.mem_write_32(0x1000, 0x80000000u64).unwrap()
};
|a: Axecutor| {
assert_reg_value!(q; a; RBX; 0x1000);
assert_eq!(a.mem_read_32(0x1000).unwrap(), 0x80000003u32);
assert_eq!(a.mem_read_32(0x1000).unwrap(), 0x80000003u64);
};
(FLAG_PF | FLAG_SF; FLAG_CF | FLAG_ZF | FLAG_OF)
];
Expand Down
4 changes: 2 additions & 2 deletions src/instructions/and.rs
View file
Original file line number Diff line number Diff line change
Expand Up @@ -636,11 +636,11 @@ mod tests {
write_reg_value!(d; a; EAX; 0x80000000u32);
write_reg_value!(q; a; RBX; 0x1000);
a.mem_init_zero(0x1000, 4).unwrap();
a.mem_write_32(0x1000, 0x80000000u32).unwrap();
a.mem_write_32(0x1000, 0x80000000u64).unwrap()
};
|a: Axecutor| {
assert_reg_value!(d; a; EAX; 0x80000000u32);
assert_eq!(a.mem_read_32(0x1000).unwrap(), 0x80000000u32);
assert_eq!(a.mem_read_32(0x1000).unwrap(), 0x80000000u64);
};
(FLAG_PF | FLAG_SF; FLAG_CF | FLAG_ZF | FLAG_OF)
];
Expand Down
28 changes: 14 additions & 14 deletions src/instructions/cmp.rs
View file
Original file line number Diff line number Diff line change
Expand Up @@ -1080,11 +1080,11 @@ mod tests {
write_reg_value!(d; a; ECX; 0x20);
write_reg_value!(q; a; RAX; 0x1000);
a.mem_init_zero(0x1000, 4).unwrap();
a.mem_write_32(0x1000, 0x80000000u32).unwrap();
a.mem_write_32(0x1000, 0x80000000u64).unwrap()
};
|a: Axecutor| {
assert_reg_value!(d; a; ECX; 0x20);
assert_eq!(a.mem_read_32(0x1000).unwrap(), 0x80000000u32);
assert_eq!(a.mem_read_32(0x1000).unwrap(), 0x80000000u64);
};
(FLAG_OF; FLAG_CF | FLAG_PF | FLAG_ZF | FLAG_SF)
];
Expand All @@ -1095,11 +1095,11 @@ mod tests {
write_reg_value!(d; a; ECX; 0x8);
write_reg_value!(q; a; RAX; 0x1000);
a.mem_init_zero(0x1000, 4).unwrap();
a.mem_write_32(0x1000, 0x80000000u32).unwrap();
a.mem_write_32(0x1000, 0x80000000u64).unwrap()
};
|a: Axecutor| {
assert_reg_value!(d; a; ECX; 0x8);
assert_eq!(a.mem_read_32(0x1000).unwrap(), 0x80000000u32);
assert_eq!(a.mem_read_32(0x1000).unwrap(), 0x80000000u64);
};
(FLAG_OF; FLAG_CF | FLAG_PF | FLAG_ZF | FLAG_SF)
];
Expand Down Expand Up @@ -1140,11 +1140,11 @@ mod tests {
write_reg_value!(d; a; ECX; 0x10);
write_reg_value!(q; a; RAX; 0x1000);
a.mem_init_zero(0x1000, 4).unwrap();
a.mem_write_32(0x1000, 0x80000000u32).unwrap();
a.mem_write_32(0x1000, 0x80000000u64).unwrap()
};
|a: Axecutor| {
assert_reg_value!(d; a; ECX; 0x10);
assert_eq!(a.mem_read_32(0x1000).unwrap(), 0x80000000u32);
assert_eq!(a.mem_read_32(0x1000).unwrap(), 0x80000000u64);
};
(FLAG_PF | FLAG_OF; FLAG_CF | FLAG_ZF | FLAG_SF)
];
Expand All @@ -1155,11 +1155,11 @@ mod tests {
write_reg_value!(d; a; ECX; 0x1);
write_reg_value!(q; a; RAX; 0x1000);
a.mem_init_zero(0x1000, 4).unwrap();
a.mem_write_32(0x1000, 0x80000000u32).unwrap();
a.mem_write_32(0x1000, 0x80000000u64).unwrap()
};
|a: Axecutor| {
assert_reg_value!(d; a; ECX; 0x1);
assert_eq!(a.mem_read_32(0x1000).unwrap(), 0x80000000u32);
assert_eq!(a.mem_read_32(0x1000).unwrap(), 0x80000000u64);
};
(FLAG_PF | FLAG_OF; FLAG_CF | FLAG_ZF | FLAG_SF)
];
Expand All @@ -1170,11 +1170,11 @@ mod tests {
write_reg_value!(d; a; ECX; 0x0);
write_reg_value!(q; a; RAX; 0x1000);
a.mem_init_zero(0x1000, 4).unwrap();
a.mem_write_32(0x1000, 0x80000000u32).unwrap();
a.mem_write_32(0x1000, 0x80000000u64).unwrap()
};
|a: Axecutor| {
assert_reg_value!(d; a; ECX; 0x0);
assert_eq!(a.mem_read_32(0x1000).unwrap(), 0x80000000u32);
assert_eq!(a.mem_read_32(0x1000).unwrap(), 0x80000000u64);
};
(FLAG_PF | FLAG_SF; FLAG_CF | FLAG_ZF | FLAG_OF)
];
Expand Down Expand Up @@ -1730,11 +1730,11 @@ mod tests {
write_reg_value!(q; a; RCX; 0x1000);
write_reg_value!(q; a; RBX; 0);
a.mem_init_zero(0x1000, 4).unwrap();
a.mem_write_32(0x1000, 0x80000000u32).unwrap();
a.mem_write_32(0x1000, 0x80000000u64).unwrap()
};
|a: Axecutor| {
assert_reg_value!(d; a; EAX; 0x0);
assert_eq!(a.mem_read_32(0x1000).unwrap(), 0x80000000u32);
assert_eq!(a.mem_read_32(0x1000).unwrap(), 0x80000000u64);
};
(FLAG_CF | FLAG_PF | FLAG_SF | FLAG_OF; FLAG_ZF)
];
Expand Down Expand Up @@ -1778,11 +1778,11 @@ mod tests {
write_reg_value!(q; a; RCX; 0x1000);
write_reg_value!(q; a; RBX; 0);
a.mem_init_zero(0x1000, 4).unwrap();
a.mem_write_32(0x1000, 0x80000000u32).unwrap();
a.mem_write_32(0x1000, 0x80000000u64).unwrap()
};
|a: Axecutor| {
assert_reg_value!(d; a; EAX; 0x1);
assert_eq!(a.mem_read_32(0x1000).unwrap(), 0x80000000u32);
assert_eq!(a.mem_read_32(0x1000).unwrap(), 0x80000000u64);
};
(FLAG_CF | FLAG_SF | FLAG_OF; FLAG_PF | FLAG_ZF)
];
Expand Down
14 changes: 7 additions & 7 deletions src/instructions/div.rs
View file
Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,7 @@ impl Axecutor {
fn instr_div_rm8(&mut self, i: Instruction) -> Result<(), AxError> {
debug_assert_eq!(i.code(), Div_rm8);

let ax = self.reg_read_16(AX);
let ax = self.reg_read_16(AX) as u16;

let op = self.instruction_operand(i, 0)?;
let src_val = match op {
Expand All @@ -46,8 +46,8 @@ impl Axecutor {

let (quotient, remainder) = (ax / src_val, ax % src_val);

self.reg_write_8(AL, quotient as u8);
self.reg_write_8(AH, remainder as u8);
self.reg_write_8(AL, quotient as u8 as u64);
self.reg_write_8(AH, remainder as u8 as u64);

Ok(())
}
Expand Down Expand Up @@ -77,8 +77,8 @@ impl Axecutor {

let (quotient, remainder) = (dst_val / src_val, dst_val % src_val);

self.reg_write_16(AX, quotient as u16);
self.reg_write_16(DX, remainder as u16);
self.reg_write_16(AX, quotient as u16 as u64);
self.reg_write_16(DX, remainder as u16 as u64);

Ok(())
}
Expand Down Expand Up @@ -108,8 +108,8 @@ impl Axecutor {

let (quotient, remainder) = (dst_val / src_val, dst_val % src_val);

self.reg_write_32(EAX, quotient as u32);
self.reg_write_32(EDX, remainder as u32);
self.reg_write_32(EAX, quotient as u32 as u64);
self.reg_write_32(EDX, remainder as u32 as u64);

Ok(())
}
Expand Down
14 changes: 14 additions & 0 deletions src/instructions/errors.rs
View file
Original file line number Diff line number Diff line change
Expand Up @@ -165,6 +165,20 @@ macro_rules! fatal_error {
}};
}

#[macro_export]
macro_rules! assert_fatal {
($cond:expr, $message:expr, $($arg:tt)*) => {{
if !($cond) {
crate::fatal_error!($message, $($arg)*);
}
}};
($cond:expr, $message:expr) => {{
if !($cond) {
crate::fatal_error!($message);
}
}};
}

#[macro_export]
macro_rules! opcode_unimplemented {
($message:expr) => {{
Expand Down
12 changes: 6 additions & 6 deletions src/instructions/idiv.rs
View file
Original file line number Diff line number Diff line change
Expand Up @@ -46,8 +46,8 @@ impl Axecutor {

let (quotient, remainder) = (ax / src_val, ax % src_val);

self.reg_write_8(AL, quotient as u8);
self.reg_write_8(AH, remainder as u8);
self.reg_write_8(AL, quotient as u8 as u64);
self.reg_write_8(AH, remainder as u8 as u64);

Ok(())
}
Expand Down Expand Up @@ -77,8 +77,8 @@ impl Axecutor {

let (quotient, remainder) = (dst_val / src_val, dst_val % src_val);

self.reg_write_16(AX, quotient as u16);
self.reg_write_16(DX, remainder as u16);
self.reg_write_16(AX, quotient as u16 as u64);
self.reg_write_16(DX, remainder as u16 as u64);

Ok(())
}
Expand Down Expand Up @@ -109,8 +109,8 @@ impl Axecutor {

let (quotient, remainder) = (dst_val / src_val, dst_val % src_val);

self.reg_write_32(EAX, quotient as u32);
self.reg_write_32(EDX, remainder as u32);
self.reg_write_32(EAX, quotient as u32 as u64);
self.reg_write_32(EDX, remainder as u32 as u64);

Ok(())
}
Expand Down
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