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Same name for instances, memories and registers #29

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Same name for instances, memories and registers #29

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Commits on Aug 24, 2021

  1. outputs

    @jdonszelmann
    jdonszelmann committed Aug 24, 2021
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  2. inputs (and removed stray verilog import)

    @jdonszelmann
    jdonszelmann committed Aug 24, 2021
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  3. fix documentation

    @jdonszelmann
    jdonszelmann committed Aug 24, 2021
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  4. avoid unnecessary allocation

    @jdonszelmann
    jdonszelmann committed Aug 24, 2021
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  5. convert vecs to maps

    @jdonszelmann
    jdonszelmann committed Aug 24, 2021
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  6. fix registers (with test)

    @jdonszelmann
    jdonszelmann committed Aug 24, 2021
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  7. fix memories and instances (with tests)

    @jdonszelmann
    jdonszelmann committed Aug 24, 2021
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