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Merge pull request #151 from zeroasiccorp/sumi
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Renaming directory/sub package umi-->lumi
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aolofsson authored Jul 31, 2024
2 parents c923595 + 72ae5c0 commit ead61f4
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Showing 39 changed files with 7 additions and 8 deletions.
4 changes: 2 additions & 2 deletions umi/__init__.py
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@@ -1,11 +1,11 @@
from umi import umi, lumi
from umi import sumi, lumi


__version__ = "0.1.2"


def setup(chip):
return [
umi.setup(chip),
sumi.setup(chip),
lumi.setup(chip)
]
2 changes: 1 addition & 1 deletion umi/lumi/__init__.py
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@@ -1,5 +1,5 @@
from siliconcompiler import Library
from umi import umi
from umi import sumi
from lambdalib import auxlib, ramlib


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2 changes: 1 addition & 1 deletion umi/lumi/rtl/lumi.v
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Expand Up @@ -127,7 +127,7 @@ module lumi
wire [RW-1:0] cb2fifo_data;
wire [AW-1:0] cb2fifo_dstaddr;
wire cb2fifo_ready;
wire [AW-1:0] cb2fifo_srcaddr;
wire [AW-1:0] cb2fifo_srcaddr;
wire cb2fifo_valid;
wire [CW-1:0] cb2regs_cmd;
wire [RW-1:0] cb2regs_data;
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7 changes: 3 additions & 4 deletions umi/umi/__init__.py → umi/sumi/__init__.py
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@@ -1,13 +1,12 @@
from siliconcompiler import Library
from lambdalib import auxlib, ramlib, vectorlib


def setup(chip):
lib = Library(chip, "umi", package="umi", auto_enable=True)
lib = Library(chip, "sumi", package="umi", auto_enable=True)
lib.register_source("umi", "python://umi")

lib.add("option", "idir", "umi/rtl")
lib.add("option", "ydir", "umi/rtl")
lib.add("option", "idir", "sumi/rtl")
lib.add("option", "ydir", "sumi/rtl")

lib.add("option", "idir", "utils/rtl")
lib.add("option", "ydir", "utils/rtl")
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