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only import umi
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gadfort committed Mar 7, 2024
1 parent 8ba9602 commit f1e7682
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Showing 8 changed files with 0 additions and 16 deletions.
2 changes: 0 additions & 2 deletions umi/lumi/testbench/test_lumi.py
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Expand Up @@ -9,7 +9,6 @@
import numpy as np
from argparse import ArgumentParser
from switchboard import SbDut, UmiTxRx, delete_queue
import lambdalib
import umi


Expand All @@ -25,7 +24,6 @@ def build_testbench(topo="2d", trace=False):
else:
raise ValueError('Invalid topology')

dut.use(lambdalib)
dut.use(umi)
dut.add('option', 'library', ['lumi', 'umi'])
dut.add('option', 'library', 'lambdalib_stdlib')
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2 changes: 0 additions & 2 deletions umi/lumi/testbench/test_lumi_rnd.py
Original file line number Diff line number Diff line change
Expand Up @@ -9,7 +9,6 @@
import numpy as np
from argparse import ArgumentParser
from switchboard import SbDut, UmiTxRx, delete_queue
import lambdalib
import umi


Expand All @@ -25,7 +24,6 @@ def build_testbench(topo="2d", trace=False):
else:
raise ValueError('Invalid topology')

dut.use(lambdalib)
dut.use(umi)
dut.add('option', 'library', ['lumi', 'umi'])
dut.add('option', 'library', 'lambdalib_stdlib')
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2 changes: 0 additions & 2 deletions umi/umi/testbench/test_crossbar.py
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Expand Up @@ -8,7 +8,6 @@
import numpy as np
from argparse import ArgumentParser
from switchboard import UmiTxRx, random_umi_packet, delete_queue, verilator_run, SbDut
import lambdalib
import umi


Expand All @@ -18,7 +17,6 @@ def build_testbench():
# Set up inputs
dut.input('umi/testbench/testbench_crossbar.sv', package='umi')

dut.use(lambdalib)
dut.use(umi)
dut.add('option', 'library', 'umi')
dut.add('option', 'library', 'lambdalib_stdlib')
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2 changes: 0 additions & 2 deletions umi/umi/testbench/test_fifo.py
Original file line number Diff line number Diff line change
Expand Up @@ -7,7 +7,6 @@
import numpy as np
from argparse import ArgumentParser
from switchboard import SbDut, UmiTxRx, delete_queue, verilator_run
import lambdalib
import umi


Expand All @@ -17,7 +16,6 @@ def build_testbench():
# Set up inputs
dut.input('umi/testbench/testbench_fifo.sv', package='umi')

dut.use(lambdalib)
dut.use(umi)
dut.add('option', 'library', 'umi')
dut.add('option', 'library', 'lambdalib_stdlib')
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2 changes: 0 additions & 2 deletions umi/umi/testbench/test_fifo_flex.py
Original file line number Diff line number Diff line change
Expand Up @@ -7,7 +7,6 @@
import numpy as np
from argparse import ArgumentParser
from switchboard import SbDut, UmiTxRx, delete_queue, verilator_run
import lambdalib
import umi


Expand All @@ -17,7 +16,6 @@ def build_testbench(split=False):
# Set up inputs
dut.input('umi/testbench/testbench_fifo_flex.sv', package='umi')

dut.use(lambdalib)
dut.use(umi)
dut.add('option', 'library', 'umi')
dut.add('option', 'library', 'lambdalib_stdlib')
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2 changes: 0 additions & 2 deletions umi/umi/testbench/test_mem_agent.py
Original file line number Diff line number Diff line change
Expand Up @@ -6,7 +6,6 @@
import numpy as np
from argparse import ArgumentParser
from switchboard import SbDut, UmiTxRx, delete_queue, verilator_run
import lambdalib
import umi


Expand All @@ -16,7 +15,6 @@ def build_testbench():
# Set up inputs
dut.input('umi/testbench/testbench_mem_agent.sv', package='umi')

dut.use(lambdalib)
dut.use(umi)
dut.add('option', 'library', 'umi')
dut.add('option', 'library', 'lambdalib_stdlib')
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2 changes: 0 additions & 2 deletions umi/umi/testbench/test_regif.py
Original file line number Diff line number Diff line change
Expand Up @@ -7,7 +7,6 @@
import numpy as np
from argparse import ArgumentParser
from switchboard import SbDut, UmiTxRx, delete_queue, verilator_run
import lambdalib
import umi


Expand All @@ -17,7 +16,6 @@ def build_testbench():
# Set up inputs
dut.input('umi/testbench/testbench_regif.sv', package='umi')

dut.use(lambdalib)
dut.use(umi)
dut.add('option', 'library', 'umi')
dut.add('option', 'library', 'lambdalib_stdlib')
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2 changes: 0 additions & 2 deletions umi/utils/testbench/test_umi2tl_np.py
Original file line number Diff line number Diff line change
Expand Up @@ -9,7 +9,6 @@
from switchboard import SbDut, UmiTxRx, delete_queue, verilator_run
from siliconcompiler.package import path as sc_path
import umi
import lambdalib


def build_testbench(topo="2d"):
Expand All @@ -30,7 +29,6 @@ def build_testbench(topo="2d"):
dut.input('utils/testbench/tlmemsim.cpp', package='umi')

dut.use(umi)
dut.use(lambdalib)
dut.add('option', 'library', ['umi', 'lambdalib_stdlib'])

# Verilator configuration
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