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add ci test to run the testbenches and fix testbenches for now #118

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merged 5 commits into from
Feb 16, 2024
Merged

add ci test to run the testbenches and fix testbenches for now #118

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8567be1
add basic CI test to run lumi testbenches
gadfort Feb 16, 2024
2896edd
add all testbenches and fix lambdalib paths
gadfort Feb 16, 2024
ff59745
fix permissions on testbenches
gadfort Feb 16, 2024
99ba573
automatically collect tests
gadfort Feb 16, 2024
f620ef2
remove on push
gadfort Feb 16, 2024
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11 changes: 11 additions & 0 deletions .github/dependabot.yml
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@@ -0,0 +1,11 @@
version: 2
updates:
# Maintain dependencies for GitHub Actions
- package-ecosystem: "github-actions"
directory: "/"
schedule:
interval: "weekly"
groups:
actions:
patterns:
- "*"
16 changes: 16 additions & 0 deletions .github/workflows/bin/collect_tests.py
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import json
import os


if __name__ == "__main__":
script_dir = os.path.dirname(os.path.abspath(__file__))
repo_dir = os.path.abspath(os.path.join(script_dir, '..', '..', '..'))
tests = []
for dirpath, dirnames, filenames in os.walk(repo_dir):
for f in filenames:
if f.startswith("test_"):
tests.append(os.path.join(dirpath, f))

tests_rel = [os.path.relpath(p, repo_dir) for p in tests]

print(json.dumps({"testbench": tests_rel}))
54 changes: 54 additions & 0 deletions .github/workflows/ci.yml
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name: Testbench CI
on:
# Runs on all PRs
pull_request:
# Manual Dispatch
workflow_dispatch:

jobs:
get_testbenches:
name: 'Get testbenches'

runs-on: ubuntu-latest

outputs:
testbenches: ${{ steps.tests.outputs.tests }}

steps:
- name: Checkout repository
uses: actions/checkout@v4

- name: Collect testbenches
id: tests
run: |
echo "tests=$(python3 .github/workflows/bin/collect_tests.py)" >> $GITHUB_OUTPUT

testbench:
needs: get_testbenches
strategy:
fail-fast: false
matrix: ${{ fromJson(needs.get_testbenches.outputs.testbenches) }}

timeout-minutes: 10
runs-on: ubuntu-latest
container:
image: ghcr.io/zeroasiccorp/sbtest:latest

steps:
- name: Check out UMI
uses: actions/checkout@v4
with:
submodules: recursive

- name: Install requirements
run: |
python3 -m venv .venv
. .venv/bin/activate
python3 -m pip install --upgrade pip
python3 -m pip install switchboard-hw

- name: Run ${{ matrix.testbench }}
run: |
. .venv/bin/activate
cd $(dirname "${{ matrix.testbench }}")
./$(basename "${{ matrix.testbench }}")
3 changes: 1 addition & 2 deletions lumi/testbench/test_lumi_rnd.py
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Expand Up @@ -67,8 +67,7 @@ def main(topo="2d", vldmode="2", rdymode="2", trace=False, host2dut="host2dut_0.
('hostdly', hostdly),
('devdly', devdly)
],
trace=trace,
args=['+verilator+seed+0']
trace=trace
)

# instantiate TX and RX queues. note that these can be instantiated without
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6 changes: 3 additions & 3 deletions umi/testbench/test_crossbar.py
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Expand Up @@ -26,9 +26,9 @@ def build_testbench():
for option in ['ydir', 'idir']:
dut.add('option', option, EX_DIR / 'rtl')
dut.add('option', option, EX_DIR / '..' / 'submodules' / 'switchboard' / 'examples' / 'common' / 'verilog')
dut.add('option', option, EX_DIR / '..' / 'submodules' / 'lambdalib' / 'ramlib' / 'rtl')
dut.add('option', option, EX_DIR / '..' / 'submodules' / 'lambdalib' / 'stdlib' / 'rtl')
dut.add('option', option, EX_DIR / '..' / 'submodules' / 'lambdalib' / 'vectorlib' / 'rtl')
dut.add('option', option, EX_DIR / '..' / 'submodules' / 'lambdalib' / 'lambdalib' / 'ramlib' / 'rtl')
dut.add('option', option, EX_DIR / '..' / 'submodules' / 'lambdalib' / 'lambdalib' / 'stdlib' / 'rtl')
dut.add('option', option, EX_DIR / '..' / 'submodules' / 'lambdalib' / 'lambdalib' / 'vectorlib' / 'rtl')

# Verilator configuration
vlt_config = EX_DIR / 'testbench' / 'config.vlt'
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6 changes: 3 additions & 3 deletions umi/testbench/test_fifo.py
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Expand Up @@ -25,9 +25,9 @@ def build_testbench():
for option in ['ydir', 'idir']:
dut.add('option', option, EX_DIR / 'rtl')
dut.add('option', option, EX_DIR / '..' / 'submodules' / 'switchboard' / 'examples' / 'common' / 'verilog')
dut.add('option', option, EX_DIR / '..' / 'submodules' / 'lambdalib' / 'ramlib' / 'rtl')
dut.add('option', option, EX_DIR / '..' / 'submodules' / 'lambdalib' / 'stdlib' / 'rtl')
dut.add('option', option, EX_DIR / '..' / 'submodules' / 'lambdalib' / 'vectorlib' / 'rtl')
dut.add('option', option, EX_DIR / '..' / 'submodules' / 'lambdalib' / 'lambdalib' / 'ramlib' / 'rtl')
dut.add('option', option, EX_DIR / '..' / 'submodules' / 'lambdalib' / 'lambdalib' / 'stdlib' / 'rtl')
dut.add('option', option, EX_DIR / '..' / 'submodules' / 'lambdalib' / 'lambdalib' / 'vectorlib' / 'rtl')

# Verilator configuration
vlt_config = EX_DIR / 'testbench' / 'config.vlt'
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6 changes: 3 additions & 3 deletions umi/testbench/test_fifo_flex.py
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Expand Up @@ -25,9 +25,9 @@ def build_testbench():
for option in ['ydir', 'idir']:
dut.add('option', option, EX_DIR / 'rtl')
dut.add('option', option, EX_DIR / '..' / 'submodules' / 'switchboard' / 'examples' / 'common' / 'verilog')
dut.add('option', option, EX_DIR / '..' / 'submodules' / 'lambdalib' / 'ramlib' / 'rtl')
dut.add('option', option, EX_DIR / '..' / 'submodules' / 'lambdalib' / 'stdlib' / 'rtl')
dut.add('option', option, EX_DIR / '..' / 'submodules' / 'lambdalib' / 'vectorlib' / 'rtl')
dut.add('option', option, EX_DIR / '..' / 'submodules' / 'lambdalib' / 'lambdalib' / 'ramlib' / 'rtl')
dut.add('option', option, EX_DIR / '..' / 'submodules' / 'lambdalib' / 'lambdalib' / 'stdlib' / 'rtl')
dut.add('option', option, EX_DIR / '..' / 'submodules' / 'lambdalib' / 'lambdalib' / 'vectorlib' / 'rtl')

# Verilator configuration
vlt_config = EX_DIR / 'testbench' / 'config.vlt'
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6 changes: 3 additions & 3 deletions umi/testbench/test_mem_agent.py
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Expand Up @@ -25,9 +25,9 @@ def build_testbench():
for option in ['ydir', 'idir']:
dut.add('option', option, EX_DIR / 'rtl')
dut.add('option', option, EX_DIR / '..' / 'submodules' / 'switchboard' / 'examples' / 'common' / 'verilog')
dut.add('option', option, EX_DIR / '..' / 'submodules' / 'lambdalib' / 'ramlib' / 'rtl')
dut.add('option', option, EX_DIR / '..' / 'submodules' / 'lambdalib' / 'stdlib' / 'rtl')
dut.add('option', option, EX_DIR / '..' / 'submodules' / 'lambdalib' / 'vectorlib' / 'rtl')
dut.add('option', option, EX_DIR / '..' / 'submodules' / 'lambdalib' / 'lambdalib' / 'ramlib' / 'rtl')
dut.add('option', option, EX_DIR / '..' / 'submodules' / 'lambdalib' / 'lambdalib' / 'stdlib' / 'rtl')
dut.add('option', option, EX_DIR / '..' / 'submodules' / 'lambdalib' / 'lambdalib' / 'vectorlib' / 'rtl')

# Verilator configuration
vlt_config = EX_DIR / 'testbench' / 'config.vlt'
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6 changes: 3 additions & 3 deletions umi/testbench/test_regif.py
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Expand Up @@ -25,9 +25,9 @@ def build_testbench():
for option in ['ydir', 'idir']:
dut.add('option', option, EX_DIR / 'rtl')
dut.add('option', option, EX_DIR / '..' / 'submodules' / 'switchboard' / 'examples' / 'common' / 'verilog')
dut.add('option', option, EX_DIR / '..' / 'submodules' / 'lambdalib' / 'ramlib' / 'rtl')
dut.add('option', option, EX_DIR / '..' / 'submodules' / 'lambdalib' / 'stdlib' / 'rtl')
dut.add('option', option, EX_DIR / '..' / 'submodules' / 'lambdalib' / 'vectorlib' / 'rtl')
dut.add('option', option, EX_DIR / '..' / 'submodules' / 'lambdalib' / 'lambdalib' / 'ramlib' / 'rtl')
dut.add('option', option, EX_DIR / '..' / 'submodules' / 'lambdalib' / 'lambdalib' / 'stdlib' / 'rtl')
dut.add('option', option, EX_DIR / '..' / 'submodules' / 'lambdalib' / 'lambdalib' / 'vectorlib' / 'rtl')

# Verilator configuration
vlt_config = EX_DIR / 'testbench' / 'config.vlt'
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8 changes: 4 additions & 4 deletions utils/testbench/test_umi2tl_np.py
100644 → 100755
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Expand Up @@ -32,10 +32,10 @@ def build_testbench(topo="2d"):
for option in ['ydir', 'idir']:
dut.add('option', option, EX_DIR / 'umi' / 'rtl')
dut.add('option', option, EX_DIR / 'utils' / 'rtl')
dut.add('option', option, EX_DIR / 'submodules' / 'lambdalib' / 'ramlib' / 'rtl')
dut.add('option', option, EX_DIR / 'submodules' / 'lambdalib' / 'stdlib' / 'rtl')
dut.add('option', option, EX_DIR / 'submodules' / 'lambdalib' / 'padring' / 'rtl')
dut.add('option', option, EX_DIR / 'submodules' / 'lambdalib' / 'vectorlib' / 'rtl')
dut.add('option', option, EX_DIR / 'submodules' / 'lambdalib' / 'lambdalib' / 'ramlib' / 'rtl')
dut.add('option', option, EX_DIR / 'submodules' / 'lambdalib' / 'lambdalib' / 'stdlib' / 'rtl')
dut.add('option', option, EX_DIR / 'submodules' / 'lambdalib' / 'lambdalib' / 'padring' / 'rtl')
dut.add('option', option, EX_DIR / 'submodules' / 'lambdalib' / 'lambdalib' / 'vectorlib' / 'rtl')

# Verilator configuration
dut.add('tool', 'verilator', 'task', 'compile', 'option', '--coverage')
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8 changes: 4 additions & 4 deletions utils/testbench/test_umi_address_remap.py
100644 → 100755
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Expand Up @@ -30,10 +30,10 @@ def build_testbench(topo="2d"):
for option in ['ydir', 'idir']:
dut.add('option', option, EX_DIR / 'umi' / 'rtl')
dut.add('option', option, EX_DIR / 'utils' / 'rtl')
dut.add('option', option, EX_DIR / 'submodules' / 'lambdalib' / 'ramlib' / 'rtl')
dut.add('option', option, EX_DIR / 'submodules' / 'lambdalib' / 'stdlib' / 'rtl')
dut.add('option', option, EX_DIR / 'submodules' / 'lambdalib' / 'padring' / 'rtl')
dut.add('option', option, EX_DIR / 'submodules' / 'lambdalib' / 'vectorlib' / 'rtl')
dut.add('option', option, EX_DIR / 'submodules' / 'lambdalib' / 'lambdalib' / 'ramlib' / 'rtl')
dut.add('option', option, EX_DIR / 'submodules' / 'lambdalib' / 'lambdalib' / 'stdlib' / 'rtl')
dut.add('option', option, EX_DIR / 'submodules' / 'lambdalib' / 'lambdalib' / 'padring' / 'rtl')
dut.add('option', option, EX_DIR / 'submodules' / 'lambdalib' / 'lambdalib' / 'vectorlib' / 'rtl')

# Verilator configuration
vlt_config = EX_DIR / 'utils' / 'testbench' / 'config.vlt'
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8 changes: 4 additions & 4 deletions utils/testbench/test_umi_packet_merge_greedy.py
100644 → 100755
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Expand Up @@ -30,10 +30,10 @@ def build_testbench(topo="2d"):
for option in ['ydir', 'idir']:
dut.add('option', option, EX_DIR / 'umi' / 'rtl')
dut.add('option', option, EX_DIR / 'utils' / 'rtl')
dut.add('option', option, EX_DIR / 'submodules' / 'lambdalib' / 'ramlib' / 'rtl')
dut.add('option', option, EX_DIR / 'submodules' / 'lambdalib' / 'stdlib' / 'rtl')
dut.add('option', option, EX_DIR / 'submodules' / 'lambdalib' / 'padring' / 'rtl')
dut.add('option', option, EX_DIR / 'submodules' / 'lambdalib' / 'vectorlib' / 'rtl')
dut.add('option', option, EX_DIR / 'submodules' / 'lambdalib' / 'lambdalib' / 'ramlib' / 'rtl')
dut.add('option', option, EX_DIR / 'submodules' / 'lambdalib' / 'lambdalib' / 'stdlib' / 'rtl')
dut.add('option', option, EX_DIR / 'submodules' / 'lambdalib' / 'lambdalib' / 'padring' / 'rtl')
dut.add('option', option, EX_DIR / 'submodules' / 'lambdalib' / 'lambdalib' / 'vectorlib' / 'rtl')

# Verilator configuration
vlt_config = EX_DIR / 'utils' / 'testbench' / 'config.vlt'
Expand Down