Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

(fix #687): links are functional it is not direction on 404 page. #688

Merged
merged 1 commit into from
Feb 9, 2024
Merged
Show file tree
Hide file tree
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
15 changes: 10 additions & 5 deletions docs/seq-ssi/flip-flops.md
Original file line number Diff line number Diff line change
Expand Up @@ -46,14 +46,15 @@ In second module, you can directly implement the flip-flop, which is edge sensit
## Sub-modules
Now let us implement various flip-flops by providing the cross coupling between NOR gates. You can also implement these flip-flops by using NAND gates, as well.

1. [SR flip-flop](https://learn.circuitverse.org/docs/flipflop/sr_flipflop.html)
2. [D flip-flop](https://learn.circuitverse.org/docs/flipflop/d_flipflop.html)
3. [JK flip-flop](https://learn.circuitverse.org/docs/flipflop/jk_flipflop.html)
4. [T flip-flop](https://learn.circuitverse.org/docs/flipflop/t_flipflop.html)
5. [Master-slave JK flip-flop](https://learn.circuitverse.org/docs/flipflop/masterslave_jk_flipflop.html)
1. [SR flip-flop](#sr_flipflop)
2. [D flip-flop](#d_flipflop)
3. [JK flip-flop](#jk_flipflop)
4. [T flip-flop](#t_flipflop)
5. [Master-slave JK flip-flop](#m_flipflop)


## SR flip-flop
{: .no_toc #sr_flipflop}

## Introduction

Expand Down Expand Up @@ -102,6 +103,7 @@ The maximum possible groupings of adjacent ones are already shown in the figure.


## D flip-flop
{: .no_toc #d_flipflop}

## Introduction

Expand Down Expand Up @@ -130,6 +132,7 @@ Next state of D flip-flop is always equal to data input, D for every positive tr


## JK flip-flop
{: .no_toc #jk_flipflop}

## Introduction

Expand Down Expand Up @@ -177,6 +180,7 @@ The maximum possible groupings of adjacent ones are already shown in the figure.


## T flip-flop
{: .no_toc #t_flipflop}

## Introduction

Expand Down Expand Up @@ -222,6 +226,7 @@ The output of T flip-flop always toggles for every positive transition of the cl


## Master-slave JK flip-Flop
{: .no_toc #m_flipflop}

## Introduction

Expand Down
12 changes: 8 additions & 4 deletions docs/seq-ssi/latches.md
Original file line number Diff line number Diff line change
Expand Up @@ -50,13 +50,14 @@ Latches are basic storage elements that operate with signal levels (rather than

Now, let us discuss about SR Latch, D Latch, JK Latch & T Latch one by one.

1. [SR latch](https://learn.circuitverse.org/docs/Latches/sr_latch.html)
2. [D latch](https://learn.circuitverse.org/docs/Latches/d_latch.html)
3. [JK latch](https://learn.circuitverse.org/docs/Latches/jk_latch.html)
4. [T latch](https://learn.circuitverse.org/docs/Latches/t_latch.html)
1. [SR latch](#sr_latch)
2. [D latch](#d_latch)
3. [JK latch](#jk_latch)
4. [T latch](#t_latch)


## SR latch
{: .no_toc #sr_latch}

## Introduction

Expand Down Expand Up @@ -93,6 +94,7 @@ Therefore, SR latch performs three types of functions such as Hold, Set & Reset


## D latch
{: .no_toc #d_latch}

## Introduction

Expand Down Expand Up @@ -123,6 +125,7 @@ In this module, you implemented various Latches by providing the cross coupling


## JK latch
{: .no_toc #jk_latch}

## Introduction

Expand All @@ -141,6 +144,7 @@ JK latch is similar to RS latch. This latch consists of 2 inputs J and K as show


## T latch
{: .no_toc #t_latch}

## Introduction

Expand Down
Loading