Updated DI unit port allocation logic and relevant unit tests.

UoB-HPC · Nov 7, 2024 · 0889f12 · 0889f12
1 parent 52aa992
commit 0889f12
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Showing 2 changed files with 20 additions and 25 deletions.
diff --git a/src/lib/pipeline/DispatchIssueUnit.cc b/src/lib/pipeline/DispatchIssueUnit.cc
@@ -75,39 +75,34 @@ void DispatchIssueUnit::tick() {
       continue;
     }
 
-    // Try find an available RS
-    uint16_t port = 0;
-    uint16_t RS_Index = 0;
-    uint16_t RS_Port = 0;
-    ReservationStation* rs;
-    bool foundRS = false;
-    while (false == foundRS && supportedPorts.size() > 0) {
-      // Allocate issue port to uop
-      port = portAllocator_.allocate(supportedPorts);
-      RS_Index = portMapping_[port].first;
-      RS_Port = portMapping_[port].second;
-      assert(RS_Index < reservationStations_.size() &&
-             "Allocated port inaccessible");
-      rs = &reservationStations_[RS_Index];
-      // When appropriate, stall uop or input buffer if stall buffer full
+    // Loop through all ports and remove any who's RS is at capacity or dispatch
+    // rate has been met
+    auto portIt = supportedPorts.begin();
+    while (portIt != supportedPorts.end()) {
+      uint16_t RS_Index = portMapping_[*portIt].first;
+      ReservationStation* rs = &reservationStations_[RS_Index];
       if (rs->currentSize == rs->capacity ||
           dispatches_[RS_Index] == rs->dispatchRate) {
-        // Deallocate port given
-        portAllocator_.deallocate(port);
-        supportedPorts.erase(
-            std::find(supportedPorts.begin(), supportedPorts.end(), port));
+        portIt = supportedPorts.erase(portIt);
       } else {
-        foundRS = true;
+        portIt++;
       }
     }
-    // If no port with capacity or available dispatch rate found. Stall and
-    // return.
-    if (false == foundRS) {
+    // If no ports left, stall and return
+    if (supportedPorts.size() == 0) {
       input_.stall(true);
       rsStalls_++;
       return;
     }
 
+    // Find an available RS
+    uint16_t port = portAllocator_.allocate(supportedPorts);
+    uint16_t RS_Index = portMapping_[port].first;
+    uint16_t RS_Port = portMapping_[port].second;
+    assert(RS_Index < reservationStations_.size() &&
+           "Allocated port inaccessible");
+    ReservationStation* rs = &reservationStations_[RS_Index];
+
     // Assume the uop will be ready
     bool ready = true;
 

diff --git a/test/unit/pipeline/DispatchIssueUnitTest.cc b/test/unit/pipeline/DispatchIssueUnitTest.cc
@@ -9,6 +9,7 @@
 namespace simeng {
 namespace pipeline {
 
+using ::testing::_;
 using ::testing::Return;
 using ::testing::ReturnRef;
 
@@ -269,8 +270,7 @@ TEST_F(PipelineDispatchIssueUnitTest, singleInstr_rsFull) {
   // All expected calls to instruction during tick()
   EXPECT_CALL(*uop, getSupportedPorts()).WillOnce(ReturnRef(suppPorts));
   // All expected calls to portAllocator during tick()
-  EXPECT_CALL(portAlloc, allocate(suppPorts)).WillOnce(Return(EAGA));
-  EXPECT_CALL(portAlloc, deallocate(EAGA));
+  EXPECT_CALL(portAlloc, allocate(_)).Times(0);
   input.getHeadSlots()[0] = uopPtr;
   diUnit.tick();
   // Ensure Reservation station sizes have stayed the same