CI CD fixes.

src/include/simeng/arch/aarch64/Instruction.hh

@@ -300,14 +300,14 @@ std::vector<std::array<uint64_t, 4>> predAsCounterToMasks(
       static_cast<uint8_t>(std::log2f(sizeof(T)) + 1);
 
   for (int r = 0; r < V; r++) {
-    for (int i = 0; i < elemsPerVec; i++) {
+    for (uint16_t i = 0; i < elemsPerVec; i++) {
       // Move bit to next position based on element type
       uint64_t shifted_active = 1ull << ((i % (64 / sizeof(T))) * sizeof(T));
       // If invert = True (invert bit = 1), predElemCount dictates number of
       // initial inactive elements.
       // If invert = False (invert bit = 0), it indicates the number of initial
       // active elements.
-      if ((r * elemsPerVec) + i < predElemCount) {
+      if (static_cast<uint64_t>(r * elemsPerVec) + i < predElemCount) {
         out[r][i / (64 / sizeof(T))] |= (invert) ? 0 : shifted_active;
       } else {
         out[r][i / (64 / sizeof(T))] |= (invert) ? shifted_active : 0;

src/include/simeng/arch/aarch64/helpers/sve.hh

@@ -1636,7 +1636,7 @@ RegisterValue sveUdot(
   const N* zm = sourceValues[2].getAsVector<N>();
 
   D out[256 / sizeof(D)] = {0};
-  for (int i = 0; i < (VL_bits / (sizeof(D) * 8)); i++) {
+  for (size_t i = 0; i < (VL_bits / (sizeof(D) * 8)); i++) {
     out[i] = zd[i];
     for (int j = 0; j < W; j++) {
       out[i] +=
@@ -1666,7 +1666,7 @@ RegisterValue sveUdot_indexed(
   const int index = metadata.operands[2].vector_index;
 
   D out[256 / sizeof(D)] = {0};
-  for (int i = 0; i < (VL_bits / (sizeof(D) * 8)); i++) {
+  for (size_t i = 0; i < (VL_bits / (sizeof(D) * 8)); i++) {
     D acc = zd[i];
     // Index into zm selects which D-type element within each 128-bit vector
     // segment to use