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ABenC377 committed Dec 9, 2024
1 parent dd3053a commit 4e1717d
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Showing 15 changed files with 70 additions and 73 deletions.
2 changes: 1 addition & 1 deletion src/include/simeng/Instruction.hh
Original file line number Diff line number Diff line change
Expand Up @@ -29,7 +29,7 @@ struct ExecutionInfo {
* Each supported ISA should provide a derived implementation of this class. */
class Instruction {
public:
virtual ~Instruction(){};
virtual ~Instruction() {};

/** Retrieve the source registers this instruction reads. */
virtual const span<Register> getSourceRegisters() const = 0;
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2 changes: 1 addition & 1 deletion src/include/simeng/arch/ArchInfo.hh
Original file line number Diff line number Diff line change
Expand Up @@ -12,7 +12,7 @@ namespace arch {
/** A class to hold and generate architecture specific configuration options. */
class ArchInfo {
public:
virtual ~ArchInfo(){};
virtual ~ArchInfo() {};

/** Get the set of system register enums currently supported. */
virtual const std::vector<uint64_t>& getSysRegEnums() const = 0;
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4 changes: 2 additions & 2 deletions src/include/simeng/arch/Architecture.hh
Original file line number Diff line number Diff line change
Expand Up @@ -30,7 +30,7 @@ struct ExceptionResult {
* cycle until complete. */
class ExceptionHandler {
public:
virtual ~ExceptionHandler(){};
virtual ~ExceptionHandler() {};
/** Tick the exception handler to progress handling of the exception. Should
* return `false` if the exception requires further handling, or `true` once
* complete. */
Expand All @@ -46,7 +46,7 @@ class Architecture {
public:
Architecture(kernel::Linux& kernel) : linux_(kernel) {}

virtual ~Architecture(){};
virtual ~Architecture() {};

/** Attempt to pre-decode from `bytesAvailable` bytes of instruction memory.
* Writes into the supplied macro-op vector, and returns the number of bytes
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8 changes: 5 additions & 3 deletions src/include/simeng/branchpredictors/BranchHistory.hh
Original file line number Diff line number Diff line change
Expand Up @@ -24,7 +24,8 @@ class BranchHistory {
* integer. */
uint64_t getHistory(uint8_t numBits) {
assert(numBits <= 64 && "Cannot get more than 64 bits without rolling");
assert(numBits <= size_ && "Cannot get more bits of branch history than "
assert(numBits <= size_ &&
"Cannot get more bits of branch history than "
"the size of the history");
return (history_[0] & ((1 << numBits) - 1));
}
Expand All @@ -33,7 +34,8 @@ class BranchHistory {
* value of size 'length'. The global history is folded by taking an
* XOR hash with the overflowing bits to get an output of 'length' bits. */
uint64_t getFolded(uint8_t numBits, uint8_t length) {
assert(numBits <= size_ && "Cannot get more bits of branch history than "
assert(numBits <= size_ &&
"Cannot get more bits of branch history than "
"the size of the history");
uint64_t output = 0;

Expand Down Expand Up @@ -105,4 +107,4 @@ class BranchHistory {
std::vector<uint64_t> history_;
};

}
} // namespace simeng
2 changes: 1 addition & 1 deletion src/include/simeng/branchpredictors/BranchPredictor.hh
Original file line number Diff line number Diff line change
Expand Up @@ -12,7 +12,7 @@ namespace simeng {
/** An abstract branch predictor interface. */
class BranchPredictor {
public:
virtual ~BranchPredictor(){};
virtual ~BranchPredictor() {};

/** Generate a branch prediction for the supplied instruction address, a
* branch type, and a known branch offset. Returns a branch direction and
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13 changes: 6 additions & 7 deletions src/include/simeng/branchpredictors/TagePredictor.hh
Original file line number Diff line number Diff line change
@@ -1,13 +1,13 @@
#pragma once

#include <algorithm>
#include <cassert>
#include <deque>
#include <map>
#include <vector>
#include <algorithm>

#include "simeng/branchpredictors/BranchPredictor.hh"
#include "simeng/branchpredictors/BranchHistory.hh"
#include "simeng/branchpredictors/BranchPredictor.hh"
#include "simeng/config/SimInfo.hh"

namespace simeng {
Expand All @@ -17,7 +17,7 @@ namespace simeng {
struct TageEntry {
uint8_t satCnt;
uint64_t tag;
uint8_t u; // usefulness counter
uint8_t u; // usefulness counter
uint64_t target;
};

Expand Down Expand Up @@ -86,8 +86,7 @@ class TagePredictor : public BranchPredictor {
* alternative prediction. This prediction info is determined from the
* tagged tables for a branch with the provided address. */
void getTaggedPrediction(uint64_t address, BranchPrediction* prediction,
BranchPrediction* altPrediction,
uint8_t* predTable,
BranchPrediction* altPrediction, uint8_t* predTable,
std::vector<uint64_t>* indices,
std::vector<uint64_t>* tags);

Expand All @@ -96,8 +95,8 @@ class TagePredictor : public BranchPredictor {
uint64_t getTaggedIndex(uint64_t address, uint8_t table);

/** Returns a hash of the address and the global history that is then trimmed
* to the appropriate tag length. The tag varies depending on the table
* that is being accessed. */
* to the appropriate tag length. The tag varies depending on the table
* that is being accessed. */
uint64_t getTag(uint64_t address, uint8_t table);

/** Updates the default, untagged prediction table on the basis of the
Expand Down
4 changes: 2 additions & 2 deletions src/include/simeng/config/ExpectationNode.hh
Original file line number Diff line number Diff line change
Expand Up @@ -134,9 +134,9 @@ class ExpectationNode {

/** Default constructor. Used primarily to provide a root node for populated
* ExpectationNode instances to be added to. */
ExpectationNode(){};
ExpectationNode() {};

~ExpectationNode(){};
~ExpectationNode() {};

/** A getter function to retrieve the key of a node. */
std::string getKey() const { return nodeKey_; }
Expand Down
2 changes: 1 addition & 1 deletion src/include/simeng/pipeline/PortAllocator.hh
Original file line number Diff line number Diff line change
Expand Up @@ -16,7 +16,7 @@ const uint8_t OPTIONAL = 1;
/** An abstract execution port allocator interface. */
class PortAllocator {
public:
virtual ~PortAllocator(){};
virtual ~PortAllocator() {};

/** Allocate a port for the specified instruction group; returns the allocated
* port. */
Expand Down
41 changes: 18 additions & 23 deletions src/lib/branchpredictors/TagePredictor.cc
Original file line number Diff line number Diff line change
Expand Up @@ -14,18 +14,18 @@ TagePredictor::TagePredictor(ryml::ConstNodeRef config)
config["Branch-Predictor"]["Global-History-Length"].as<uint16_t>()),
rasSize_(config["Branch-Predictor"]["RAS-entries"].as<uint16_t>()),
globalHistory_(1 << (numTageTables_ + 1)),
tagLength_(config["Branch-Predictor"]["Tag-Length"].as<uint8_t>())
{
tagLength_(config["Branch-Predictor"]["Tag-Length"].as<uint8_t>()) {
// Calculate the saturation counter boundary between weakly taken and
// not-taken. `(2 ^ num_sat_cnt_bits) / 2` gives the weakly taken state
// value
uint8_t weaklyTaken = (uint8_t)1 << (satCntBits_ - 1);
uint8_t satCntVal = (config["Branch-Predictor"]["Fallback-Static-Predictor"]
.as<std::string>() == "Always-Taken")
? weaklyTaken : (weaklyTaken - 1);
? weaklyTaken
: (weaklyTaken - 1);
// Create branch prediction structures
btb_ = std::vector<std::pair<uint8_t, uint64_t>>(
(uint8_t)1 << btbBits_, {satCntVal, 0});
btb_ = std::vector<std::pair<uint8_t, uint64_t>>((uint8_t)1 << btbBits_,
{satCntVal, 0});

// Set up Tagged tables
for (uint32_t i = 0; i < numTageTables_; i++) {
Expand Down Expand Up @@ -96,8 +96,8 @@ BranchPrediction TagePredictor::predict(uint64_t address, BranchType type,
}

void TagePredictor::update(uint64_t address, bool isTaken,
uint64_t targetAddress,
simeng::BranchType type, uint64_t instructionId) {
uint64_t targetAddress, simeng::BranchType type,
uint64_t instructionId) {
// Make sure that this function is called in program order; and then update
// the lastUpdatedInstructionId variable
assert(instructionId >= lastUpdatedInstructionId &&
Expand Down Expand Up @@ -148,7 +148,6 @@ void TagePredictor::flush(uint64_t address) {

// Roll back global history
globalHistory_.rollBack();

}

void TagePredictor::getTaggedPrediction(uint64_t address,
Expand Down Expand Up @@ -194,20 +193,19 @@ BranchPrediction TagePredictor::getBtbPrediction(uint64_t address) {
uint64_t TagePredictor::getTaggedIndex(uint64_t address, uint8_t table) {
// Hash function here is pretty arbitrary.
uint64_t h1 = (address >> 2);
uint64_t h2 = globalHistory_.getFolded(1 << (table + 1),
(1 << tageTableBits_) - 1);
uint64_t h2 =
globalHistory_.getFolded(1 << (table + 1), (1 << tageTableBits_) - 1);
return (h1 ^ h2) & ((1 << tageTableBits_) - 1);
}

uint64_t TagePredictor::getTag(uint64_t address, uint8_t table) {
// Hash function here is pretty arbitrary.
uint64_t h1 = address;
uint64_t h2 = globalHistory_.getFolded((1ull << table),
((1ull << tagLength_) - 1));
uint64_t h2 =
globalHistory_.getFolded((1ull << table), ((1ull << tagLength_) - 1));
return (h1 ^ h2) & ((1ull << tagLength_) - 1);
}


void TagePredictor::updateBtb(uint64_t address, bool isTaken,
uint64_t targetAddress) {
// Calculate 2-bit saturating counter value
Expand All @@ -226,17 +224,14 @@ void TagePredictor::updateBtb(uint64_t address, bool isTaken,
}
}


void TagePredictor::updateTaggedTables(bool isTaken,
uint64_t target) {
void TagePredictor::updateTaggedTables(bool isTaken, uint64_t target) {
// Get stored information from the FTQ
uint8_t predTable = ftq_.front().predTable;
std::vector<uint64_t> indices = ftq_.front().indices;
std::vector<uint64_t> tags = ftq_.front().tags;
BranchPrediction pred = ftq_.front().prediction;
BranchPrediction altPred = ftq_.front().altPrediction;


// Update the prediction counter
uint64_t predIndex = indices[predTable];
if (isTaken && (tageTables_[predTable][predIndex].satCnt < 3)) {
Expand All @@ -252,9 +247,9 @@ void TagePredictor::updateTaggedTables(bool isTaken,
bool allocated = false;
for (uint8_t table = predTable + 1; table < numTageTables_; table++) {
if (!allocated && (tageTables_[table][indices[table]].u <= 1)) {
tageTables_[table][indices[table]] = {((isTaken) ? (uint8_t)2 :
(uint8_t)1),
tags[table], (uint8_t)2, target};
tageTables_[table][indices[table]] = {
((isTaken) ? (uint8_t)2 : (uint8_t)1), tags[table], (uint8_t)2,
target};
allocated = true;
}
}
Expand All @@ -267,11 +262,11 @@ void TagePredictor::updateTaggedTables(bool isTaken,
uint8_t currentU = tageTables_[predTable][indices[predTable]].u;
if (wasUseful && currentU < 3) {
(tageTables_[predTable][indices[predTable]].u)++;
} if (!wasUseful && currentU > 0) {
}
if (!wasUseful && currentU > 0) {
(tageTables_[predTable][indices[predTable]].u)--;
}

}
}

} // namespace simeng
} // namespace simeng
19 changes: 10 additions & 9 deletions src/lib/config/ModelConfig.cc
Original file line number Diff line number Diff line change
Expand Up @@ -531,8 +531,9 @@ void ModelConfig::setExpectations(bool isDefault) {
// associated YAML node
if (configTree_["Branch-Predictor"].has_child(ryml::to_csubstr("Type"))) {
if ((configTree_["Branch-Predictor"]["Type"].as<std::string>() ==
"Generic") || (configTree_["Branch-Predictor"]["Type"]
.as<std::string>() == "Tage")) {
"Generic") ||
(configTree_["Branch-Predictor"]["Type"].as<std::string>() ==
"Tage")) {
expectations_["Branch-Predictor"].addChild(
ExpectationNode::createExpectation<uint8_t>(
2, "Saturating-Count-Bits"));
Expand All @@ -546,17 +547,17 @@ void ModelConfig::setExpectations(bool isDefault) {
.setValueSet(
std::vector<std::string>{"Always-Taken", "Always-Not-Taken"});
}
if ((configTree_["Branch-Predictor"]["Type"].as<std::string>()
== "Tage")) {
if ((configTree_["Branch-Predictor"]["Type"].as<std::string>() ==
"Tage")) {
expectations_["Branch-Predictor"].addChild(
ExpectationNode::createExpectation<uint8_t>(
12, "Tage-Table-Bits"));
ExpectationNode::createExpectation<uint8_t>(12,
"Tage-Table-Bits"));
expectations_["Branch-Predictor"]["Tage-Table-Bits"]
.setValueBounds<uint8_t>(1, UINT8_MAX);
.setValueBounds<uint8_t>(1, UINT8_MAX);

expectations_["Branch-Predictor"].addChild(
ExpectationNode::createExpectation<uint8_t>(
6, "Num-Tage-Tables"));
ExpectationNode::createExpectation<uint8_t>(6,
"Num-Tage-Tables"));
expectations_["Branch-Predictor"]["Num-Tage-Tables"]
.setValueBounds<uint8_t>(1, UINT8_MAX);

Expand Down
6 changes: 4 additions & 2 deletions src/lib/models/inorder/Core.cc
Original file line number Diff line number Diff line change
Expand Up @@ -148,8 +148,10 @@ std::map<std::string, std::string> Core::getStats() const {
ipcStr << std::setprecision(2) << ipc;

return {
{"cycles", std::to_string(ticks_)}, {"retired", std::to_string(retired)},
{"ipc", ipcStr.str()}, {"flushes", std::to_string(flushes_)},
{"cycles", std::to_string(ticks_)},
{"retired", std::to_string(retired)},
{"ipc", ipcStr.str()},
{"flushes", std::to_string(flushes_)},
};
}

Expand Down
8 changes: 2 additions & 6 deletions test/integration/ConfigTest.cc
Original file line number Diff line number Diff line change
Expand Up @@ -300,9 +300,7 @@ TEST(ConfigTest, invalidTypeOnSetBounds) {
simeng::config::ExpectationNode::createExpectation<std::string>("DEFAULT",
"CHILD"));
ASSERT_DEATH(
{
expectations["HEAD"]["CHILD"].setValueSet<int32_t>({0, 1, 2});
},
{ expectations["HEAD"]["CHILD"].setValueSet<int32_t>({0, 1, 2}); },
"The data type of the passed vector used in setValueSet\\() "
"does not match that held within the ExpectationNode with key "
"HEAD:CHILD. Passed vector elements are of type 32-bit integer and the "
Expand All @@ -320,9 +318,7 @@ TEST(ConfigTest, alreadyDefinedBounds) {
simeng::config::ExpectationNode::createExpectation<uint64_t>(0, "CHILD"));
expectations["HEAD"]["CHILD"].setValueBounds<uint64_t>(0, 10);
ASSERT_DEATH(
{
expectations["HEAD"]["CHILD"].setValueSet<uint64_t>({1, 2, 3});
},
{ expectations["HEAD"]["CHILD"].setValueSet<uint64_t>({1, 2, 3}); },
"Invalid call of setValueSet\\() for the ExpectationNode with key "
"HEAD:CHILD as value bounds have already been defined.");
}
Expand Down
2 changes: 1 addition & 1 deletion test/regression/aarch64/instructions/neon.cc
Original file line number Diff line number Diff line change
Expand Up @@ -2546,7 +2546,7 @@ TEST_P(InstNeon, mvni) {
~((32u << 8) | 255)});
}

TEST_P(InstNeon, not ) {
TEST_P(InstNeon, not) {
initialHeapData_.resize(128);
uint8_t* heap = reinterpret_cast<uint8_t*>(initialHeapData_.data());
heap[0] = 0b11111111;
Expand Down
27 changes: 15 additions & 12 deletions test/unit/aarch64/AuxiliaryFunctionsTest.cc
Original file line number Diff line number Diff line change
Expand Up @@ -71,10 +71,11 @@ TEST(AArch64AuxiliaryFunctionTest, BitfieldManipulate) {
{ bitfieldManipulate<uint16_t>(0, 0, 16, 0, false); },
"Attempted to use a rotate amount of 16 in bitfieldManipulate which is "
"greater than or equal to the data type size of 16b in use");
ASSERT_DEATH({ bitfieldManipulate<uint16_t>(0, 0, 0, 16, false); },
"Attempted to use a source bit position value of 16 in "
"bitfieldManipulate which is greater than or equal to the data "
"type size of 16b in use");
ASSERT_DEATH(
{ bitfieldManipulate<uint16_t>(0, 0, 0, 16, false); },
"Attempted to use a source bit position value of 16 in "
"bitfieldManipulate which is greater than or equal to the data "
"type size of 16b in use");

// uint32
EXPECT_EQ(bitfieldManipulate<uint32_t>(0x0000FFFF, 0xFFFF0000, 0, 0, false),
Expand Down Expand Up @@ -104,10 +105,11 @@ TEST(AArch64AuxiliaryFunctionTest, BitfieldManipulate) {
{ bitfieldManipulate<uint32_t>(0, 0, 32, 0, false); },
"Attempted to use a rotate amount of 32 in bitfieldManipulate which is "
"greater than or equal to the data type size of 32b in use");
ASSERT_DEATH({ bitfieldManipulate<uint32_t>(0, 0, 0, 32, false); },
"Attempted to use a source bit position value of 32 in "
"bitfieldManipulate which is greater than or equal to the data "
"type size of 32b in use");
ASSERT_DEATH(
{ bitfieldManipulate<uint32_t>(0, 0, 0, 32, false); },
"Attempted to use a source bit position value of 32 in "
"bitfieldManipulate which is greater than or equal to the data "
"type size of 32b in use");

// uint64
EXPECT_EQ(bitfieldManipulate<uint64_t>(0x00000000FFFFFFFF, 0xFFFFFFFF00000000,
Expand Down Expand Up @@ -147,10 +149,11 @@ TEST(AArch64AuxiliaryFunctionTest, BitfieldManipulate) {
{ bitfieldManipulate<uint64_t>(0, 0, 64, 0, false); },
"Attempted to use a rotate amount of 64 in bitfieldManipulate which is "
"greater than or equal to the data type size of 64b in use");
ASSERT_DEATH({ bitfieldManipulate<uint64_t>(0, 0, 0, 64, false); },
"Attempted to use a source bit position value of 64 in "
"bitfieldManipulate which is greater than or equal to the data "
"type size of 64b in use");
ASSERT_DEATH(
{ bitfieldManipulate<uint64_t>(0, 0, 0, 64, false); },
"Attempted to use a source bit position value of 64 in "
"bitfieldManipulate which is greater than or equal to the data "
"type size of 64b in use");
}

/** `conditionHolds` Tests */
Expand Down
3 changes: 1 addition & 2 deletions test/unit/pipeline/FetchUnitTest.cc
Original file line number Diff line number Diff line change
Expand Up @@ -279,8 +279,7 @@ TEST_P(PipelineFetchUnitTest, fetchTakenBranchMidBlock) {
EXPECT_CALL(*uop, getBranchType()).WillOnce(Return(bType));
EXPECT_CALL(*uop, getKnownOffset()).WillOnce(Return(knownOff));
BranchPrediction pred = {true, pc + knownOff};
EXPECT_CALL(predictor, predict(20, bType, knownOff))
.WillOnce(Return(pred));
EXPECT_CALL(predictor, predict(20, bType, knownOff)).WillOnce(Return(pred));
fetchUnit.tick();

// Ensure on next tick, predecode is not called
Expand Down

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