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47 Open 136 Closed
47 Open 136 Closed
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Issues list

Unable to verify my Rapidsmith installation
#387 opened May 8, 2020 by sandeeprpandey
10
Resolve duplication of efforts with Lut Routethroughs and Pseudo VCC Pins
#385 opened Aug 27, 2019 by DallonTG
Get 7 Series bonded sites with true site names enhancement
#376 opened Jun 5, 2019 by DallonTG
PartialDeviceTest Failing with OpenJDK 11
#375 opened Jun 5, 2019 by DallonTG
Include common hidden macros in Cell Library enhancement
#370 opened Mar 4, 2019 by DallonTG
Create EDIF RPMs for all macros
#367 opened Feb 6, 2019 by DallonTG
Travis CI build info missing
#366 opened Jan 26, 2019 by DallonTG
3
RapidSmith2 support for Virtex UltraScale+ XCVU9P-L2FLGA2104 Device
#353 opened Aug 16, 2018 by amitkulkarnis
1
Net properties not included in EDIF bug
#352 opened May 17, 2018 by DallonTG
@DallonTG
Role of RS2 and RapidWright
#347 opened May 2, 2018 by trharoldsen
1
reverseRouting naming inconsistency
#343 opened Mar 3, 2018 by DallonTG
2
Carry4 CI cell pin maps to CYINIT pin and not CI pin on BEL. Priority:High
#339 opened Feb 18, 2018 by trharoldsen
Undescriptive error message in DeviceGenerator enhancement
#335 opened Feb 1, 2018 by DallonTG
1
Better method for determining compatible types
#333 opened Jan 21, 2018 by trharoldsen
SliceL is not a compatible type of SliceM on Artix7
#332 opened Jan 21, 2018 by trharoldsen
1
Add TieoffSites to FamilyInfo files
#331 opened Jan 20, 2018 by trharoldsen
Support for Zynq UltraScale+ family
#307 opened Nov 14, 2017 by sch-alex
2
Design::deepCopy does not work correctly bug
#304 opened Nov 8, 2017 by trharoldsen Release 1.0
@trharoldsen
3
Routing documentation is still confusing documentation
#301 opened Nov 4, 2017 by trharoldsen
RAMD type cells have incomplete placement information. bug Priority:Medium
#295 opened Oct 27, 2017 by trharoldsen
3
CellPin WEBWE[0] on RAMB18E1 has no mapped BelPins enhancement Priority:High
#291 opened Oct 21, 2017 by trharoldsen
8
Our serialization of device data structure does not use versioning well
#263 opened Aug 23, 2017 by nelsobe
64-bit QT for Windows
#262 opened Aug 21, 2017 by nelsobe
@grigg3
2
Refactor Example Programs to Work as Tests
#261 opened Aug 21, 2017 by nelsobe
1
Convert Wires To Nodes
#246 opened May 12, 2017 by trharoldsen
5
ProTip! Exclude everything labeled bug with -label:bug.