adding assertion for x check on all hwif in structs in rdl reg files

src/datavault/rtl/dv_reg.sv

@@ -480,4 +480,7 @@ module dv_reg (
     assign cpuif_rd_ack = readback_done;
     assign cpuif_rd_data = readback_data;
     assign cpuif_rd_err = readback_err;
+
+`CALIPTRA_ASSERT_KNOWN(ERR_HWIF_IN, hwif_in, clk, '1)
+
 endmodule

src/doe/rtl/doe_reg.sv

@@ -1408,4 +1408,7 @@ module doe_reg (
     assign cpuif_rd_ack = readback_done;
     assign cpuif_rd_data = readback_data;
     assign cpuif_rd_err = readback_err;
+
+`CALIPTRA_ASSERT_KNOWN(ERR_HWIF_IN, hwif_in, clk, '1)
+
 endmodule

src/ecc/rtl/ecc_reg.sv

@@ -1813,4 +1813,7 @@ module ecc_reg (
     assign cpuif_rd_ack = readback_done;
     assign cpuif_rd_data = readback_data;
     assign cpuif_rd_err = readback_err;
+
+`CALIPTRA_ASSERT_KNOWN(ERR_HWIF_IN, hwif_in, clk, '1)
+
 endmodule

src/hmac/rtl/hmac_reg.sv

@@ -2053,4 +2053,7 @@ module hmac_reg (
     assign cpuif_rd_ack = readback_done;
     assign cpuif_rd_data = readback_data;
     assign cpuif_rd_err = readback_err;
+
+`CALIPTRA_ASSERT_KNOWN(ERR_HWIF_IN, hwif_in, clk, '1)
+
 endmodule

src/keyvault/rtl/kv_reg.sv

@@ -442,4 +442,7 @@ module kv_reg (
     assign cpuif_rd_ack = readback_done;
     assign cpuif_rd_data = readback_data;
     assign cpuif_rd_err = readback_err;
+
+`CALIPTRA_ASSERT_KNOWN(ERR_HWIF_IN, hwif_in, clk, '1)
+
 endmodule

src/pcrvault/rtl/pv_reg.sv

@@ -293,4 +293,7 @@ module pv_reg (
     assign cpuif_rd_ack = readback_done;
     assign cpuif_rd_data = readback_data;
     assign cpuif_rd_err = readback_err;
+
+`CALIPTRA_ASSERT_KNOWN(ERR_HWIF_IN, hwif_in, clk, '1)
+
 endmodule

src/sha256/rtl/sha256_reg.sv

@@ -1425,4 +1425,7 @@ module sha256_reg (
     assign cpuif_rd_ack = readback_done;
     assign cpuif_rd_data = readback_data;
     assign cpuif_rd_err = readback_err;
+
+`CALIPTRA_ASSERT_KNOWN(ERR_HWIF_IN, hwif_in, clk, '1)
+
 endmodule

src/sha512/rtl/sha512_reg.sv

@@ -2024,4 +2024,7 @@ module sha512_reg (
     assign cpuif_rd_ack = readback_done;
     assign cpuif_rd_data = readback_data;
     assign cpuif_rd_err = readback_err;
+
+`CALIPTRA_ASSERT_KNOWN(ERR_HWIF_IN, hwif_in, clk, '1)
+
 endmodule

src/soc_ifc/rtl/mbox_csr.sv

@@ -580,4 +580,7 @@ module mbox_csr (
     assign cpuif_rd_ack = readback_done;
     assign cpuif_rd_data = readback_data;
     assign cpuif_rd_err = readback_err;
+
+`CALIPTRA_ASSERT_KNOWN(ERR_HWIF_IN, hwif_in, clk, '1)
+
 endmodule

src/soc_ifc/rtl/sha512_acc_csr.sv

@@ -1615,4 +1615,7 @@ module sha512_acc_csr (
     assign cpuif_rd_ack = readback_done;
     assign cpuif_rd_data = readback_data;
     assign cpuif_rd_err = readback_err;
+
+`CALIPTRA_ASSERT_KNOWN(ERR_HWIF_IN, hwif_in, clk, '1)
+
 endmodule

src/soc_ifc/rtl/soc_ifc_reg.sv

@@ -5683,4 +5683,7 @@ module soc_ifc_reg (
     assign cpuif_rd_ack = readback_done;
     assign cpuif_rd_data = readback_data;
     assign cpuif_rd_err = readback_err;
+
+`CALIPTRA_ASSERT_KNOWN(ERR_HWIF_IN, hwif_in, clk, '1)
+
 endmodule

tools/scripts/rdl_post_process.py

@@ -35,6 +35,7 @@ def scrub_line_by_line(fname):
         has_reg_strb = re.search(r'\bdecoded_reg_strb\b', line)
         has_unpacked = re.search(r'\[\d+\]', line)
         has_struct = re.search(r'\bstruct\b\s*(?:unpacked)?', line)
+        is_endmodule = re.search(r'\bendmodule\b', line)
         # Skip lines with logic assignments or references to signals; we
         # only want to scrub signal definitions for unpacked arrays
         if (has_assign is not None or has_reg_strb is not None):
@@ -55,6 +56,11 @@ def scrub_line_by_line(fname):
                 has_unpacked = re.search(r'\[\d+\]', line)
             mod_lines+=line
             mod_cnt+=1
+        elif (is_endmodule is not None):
+            mod_lines+="\n"
+            mod_lines+="`CALIPTRA_ASSERT_KNOWN(ERR_HWIF_IN, hwif_in, clk, '1)\n"
+            mod_lines+="\n"
+            mod_lines+=line
         else:
             mod_lines+=line
     #print(f"modified {mod_cnt} lines with unpacked arrays in {fname}")