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SHA512 Zeroize all internal registers not working in Caliptra 1.1
#675
opened Dec 20, 2024 by
lindadong919
Feasibility of granting ROM access to LDevID CDI after update-reset
2.0 feature request
#668
opened Dec 18, 2024 by
bluegate010
Request for Fuse Addition to Identify PQC Key Type for Firmware Image Validation
#659
opened Dec 6, 2024 by
mhatrevi
Question about Physical Noise Source input in Caliptra INTERNAL_TRNG
#652
opened Nov 26, 2024 by
jonghyun5-park
Update caliptra mode naming - subsystem/passive
2.0 feature request
documentation
Improvements or additions to documentation
#650
opened Nov 21, 2024 by
calebofearth
Update RISC-V core with fixes from VeeR EL2 repository for Caliptra Core 2.0
2.0 feature request
Approved
enhancement
New feature or request
#631
opened Nov 12, 2024 by
calebofearth
enable SHA restore feature through sha accelerator
enhancement
New feature or request
#620
opened Oct 29, 2024 by
mojtaba-bisheh
Register spec web page needed for 1.x
documentation
Improvements or additions to documentation
#605
opened Oct 22, 2024 by
nquarton
DMI version and RISC-V core version in Caliptra-rtl 1.1
bug
Something isn't working
#602
opened Oct 12, 2024 by
lindadong919
Do KV slots have error correction/detection?
2.0 feature request
#592
opened Sep 13, 2024 by
bluegate010
Package Macro potential issue
Approved
bug
Something isn't working
duplicate
This issue or pull request already exists
#591
opened Sep 12, 2024 by
nikola-kovacevic-ns
Clarification about BootFSM_GO register programming requirement
#574
opened Aug 19, 2024 by
myviewfinder
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