[UVM] Fix error detection in certain error injection tests (#467)

* Enhance error prediction abilities for error injection mailbox sequence

Add different types of errors that may be expected when injecting errors
to a sequence.
In the handler sequence, detect when the requested response dlen is out
of bounds and flag a cmd failure.
In the SoC Mailbox command issuer sequence, correctly set the expected
error type. When random reg writes overwrite the requested response
dlen, flag that type of error. In the status evaluator, allow
CMD_FAILURE even without an error interrupt for this event, because
there is no protocol violation to expect.

* Flag a CMD_FAILURE when requested resp_dlen is out of bounds

* Demote error to 'info' regarding nop writes to CPTRA_FW_EXTENDED_ERROR_INFO

src/integration/test_suites/caliptra_rt/caliptra_rt.c

@@ -133,7 +133,6 @@ void caliptra_rt() {
     int i;
     int wdt_rand_t1_val;
     int wdt_rand_t2_val;
-    int mode = 0;
 
     VPRINTF(MEDIUM, "----------------------------------\n");
     VPRINTF(LOW,    "- Caliptra Validation RT!!\n"        );
@@ -322,6 +321,7 @@ void caliptra_rt() {
 
         if (cptra_intr_rcv.soc_ifc_notif   ) {
             uint8_t fsm_chk;
+            uint8_t fail = 0;
             VPRINTF(LOW, "Intr received: soc_ifc_notif\n");
             if (cptra_intr_rcv.soc_ifc_notif & SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_AVAIL_STS_MASK) {
                 CLEAR_INTR_FLAG_SAFELY(cptra_intr_rcv.soc_ifc_notif, ~SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_AVAIL_STS_MASK)
@@ -484,8 +484,12 @@ void caliptra_rt() {
                         // If we hit a double-bit ECC error already, skip this step
                         // (we might have gotten a huge resp dlen from the corrupted read)
                         // and fail the command
+                        // Or if the resp dlen is outright absurd, also fail
                         if (cptra_intr_rcv.soc_ifc_error & SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_MBOX_ECC_UNC_STS_MASK) {
                             VPRINTF(ERROR, "Skipping resp data wr on UNC ECC err\n");
+                        } else if (temp > MBOX_DIR_SPAN) {
+                            VPRINTF(ERROR, "Skipping resp data wr on invalid dlen: 0x%x\n", temp);
+                            fail = 1;
                         } else {
                             for (loop_iter = 0; loop_iter<temp; loop_iter+=4) {
                                 lsu_write_32((uintptr_t) (CLP_MBOX_CSR_MBOX_DATAIN), rand());
@@ -513,6 +517,9 @@ void caliptra_rt() {
                         CLEAR_INTR_FLAG_SAFELY(cptra_intr_rcv.soc_ifc_error, ~SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_MBOX_ECC_UNC_STS_MASK)
                         VPRINTF(LOW, "Clearing FW soc_ifc_error intr bit (ECC unc) after servicing\n");
                         soc_ifc_set_mbox_status_field(CMD_FAILURE);
+                    } else if (fail) {
+                        VPRINTF(LOW, "Cmd failed\n");
+                        soc_ifc_set_mbox_status_field(CMD_FAILURE);
                     } else {
                         soc_ifc_set_mbox_status_field(DATA_READY);
                     }

src/soc_ifc/uvmf_soc_ifc/uvmf_template_output/verification_ip/environment_packages/soc_ifc_env_pkg/sequences/mbox/cptra/soc_ifc_env_cptra_mbox_handler_sequence.svh

@@ -303,11 +303,16 @@ task soc_ifc_env_cptra_mbox_handler_sequence::mbox_push_datain();
     if (mbox_resp_expected_dlen == 0) begin
         `uvm_error("CPTRA_MBOX_HANDLER", "Command received with response data requested, but size of expected response data is 0!")
     end
-    // Write random datain
-    for (ii=0; ii < mbox_resp_expected_dlen; ii+=4) begin
-        if (!std::randomize(data)) `uvm_error("CPTRA_MBOX_HANDLER", "Failed to randomize data")
-        reg_model.mbox_csr_rm.mbox_datain.write(reg_sts, data, UVM_FRONTDOOR, reg_model.soc_ifc_AHB_map, this);
-        report_reg_sts(reg_sts, "mbox_datain");
+    else if (mbox_resp_expected_dlen > MBOX_SIZE_BYTES) begin
+        `uvm_info("CPTRA_MBOX_HANDLER", $sformatf("Command received with response data requested, size of expected response data [0x%x] is larger than Mailbox [0x%x]! Command will complete with failure status", mbox_resp_expected_dlen, MBOX_SIZE_BYTES), UVM_LOW)
+    end
+    else begin
+        // Write random datain
+        for (ii=0; ii < mbox_resp_expected_dlen; ii+=4) begin
+            if (!std::randomize(data)) `uvm_error("CPTRA_MBOX_HANDLER", "Failed to randomize data")
+            reg_model.mbox_csr_rm.mbox_datain.write(reg_sts, data, UVM_FRONTDOOR, reg_model.soc_ifc_AHB_map, this);
+            report_reg_sts(reg_sts, "mbox_datain");
+        end
     end
 endtask
 
@@ -323,7 +328,9 @@ task soc_ifc_env_cptra_mbox_handler_sequence::mbox_set_status();
     reg_model.mbox_csr_rm.mbox_dlen.write(reg_sts, mbox_resp_expected_dlen, UVM_FRONTDOOR, reg_model.soc_ifc_AHB_map, this);
     report_reg_sts(reg_sts, "mbox_dlen");
     // Determine which status to set and perform the write
-    status = op.cmd.cmd_s.resp_reqd ? DATA_READY : CMD_COMPLETE;
+    status = (op.cmd.cmd_s.resp_reqd && (mbox_resp_expected_dlen inside {[1:MBOX_SIZE_BYTES]})) ? DATA_READY :
+             (op.cmd.cmd_s.resp_reqd)                                                           ? CMD_FAILURE :
+                                                                                                  CMD_COMPLETE;
     data = uvm_reg_data_t'(status) << reg_model.mbox_csr_rm.mbox_status.status.get_lsb_pos();
     reg_model.mbox_csr_rm.mbox_status.write(reg_sts, data, UVM_FRONTDOOR, reg_model.soc_ifc_AHB_map, this);
     report_reg_sts(reg_sts, "mbox_status");

src/soc_ifc/uvmf_soc_ifc/uvmf_template_output/verification_ip/environment_packages/soc_ifc_env_pkg/sequences/mbox/soc_ifc/soc_ifc_env_mbox_dlen_overflow_sequence.svh

@@ -40,7 +40,6 @@ class soc_ifc_env_mbox_dlen_overflow_sequence extends soc_ifc_env_mbox_sequence_
 endclass
 
 task soc_ifc_env_mbox_dlen_overflow_sequence::mbox_push_datain();
-    int ii;
     uvm_reg_data_t data;
     int unsigned overflow_bytes;
 
@@ -52,17 +51,17 @@ task soc_ifc_env_mbox_dlen_overflow_sequence::mbox_push_datain();
     else
         `uvm_info("MBOX_OVERFLOW_SEQ", $sformatf("Randomized overflow bytes to %0d", overflow_bytes), UVM_MEDIUM)
 
-    for (ii=0; ii < this.mbox_op_rand.dlen+overflow_bytes; ii+=4) begin
-        if (ii == 0) begin
+    for (datain_ii=0; datain_ii < this.mbox_op_rand.dlen+overflow_bytes; datain_ii+=4) begin
+        if (datain_ii == 0) begin
             data = uvm_reg_data_t'(mbox_op_rand.dlen - 8);
         end
-        else if (ii == 4) begin
+        else if (datain_ii == 4) begin
             data = uvm_reg_data_t'(mbox_resp_expected_dlen);
         end
         else begin
             if (!std::randomize(data)) `uvm_error("MBOX_SEQ", "Failed to randomize data")
         end
-        `uvm_info("MBOX_SEQ", $sformatf("[Iteration: %0d] Sending datain: 0x%x", ii/4, data), UVM_DEBUG)
+        `uvm_info("MBOX_SEQ", $sformatf("[Iteration: %0d] Sending datain: 0x%x", datain_ii/4, data), UVM_DEBUG)
         reg_model.mbox_csr_rm.mbox_datain_sem.get();
         reg_model.mbox_csr_rm.mbox_datain.write(reg_sts, uvm_reg_data_t'(data), UVM_FRONTDOOR, reg_model.soc_ifc_APB_map, this, .extension(get_rand_user(PAUSER_PROB_DATAIN)));
         reg_model.mbox_csr_rm.mbox_datain_sem.put();

src/soc_ifc/uvmf_soc_ifc/uvmf_template_output/verification_ip/environment_packages/soc_ifc_env_pkg/sequences/mbox/soc_ifc/soc_ifc_env_mbox_dlen_underflow_sequence.svh

@@ -40,7 +40,6 @@ class soc_ifc_env_mbox_dlen_underflow_sequence extends soc_ifc_env_mbox_sequence
 endclass
 
 task soc_ifc_env_mbox_dlen_underflow_sequence::mbox_push_datain();
-    int ii;
     uvm_reg_data_t data;
     int unsigned underflow_bytes;
 
@@ -50,17 +49,17 @@ task soc_ifc_env_mbox_dlen_underflow_sequence::mbox_push_datain();
     else
         `uvm_info("MBOX_UNDERFLOW_SEQ", $sformatf("Randomized underflow bytes to %0d", underflow_bytes), UVM_MEDIUM)
 
-    for (ii=0; ii < this.mbox_op_rand.dlen-underflow_bytes; ii+=4) begin
-        if (ii == 0) begin
+    for (datain_ii=0; datain_ii < this.mbox_op_rand.dlen-underflow_bytes; datain_ii+=4) begin
+        if (datain_ii == 0) begin
             data = uvm_reg_data_t'(mbox_op_rand.dlen - 8);
         end
-        else if (ii == 4) begin
+        else if (datain_ii == 4) begin
             data = uvm_reg_data_t'(mbox_resp_expected_dlen);
         end
         else begin
             if (!std::randomize(data)) `uvm_error("MBOX_SEQ", "Failed to randomize data")
         end
-        `uvm_info("MBOX_SEQ", $sformatf("[Iteration: %0d] Sending datain: 0x%x", ii/4, data), UVM_DEBUG)
+        `uvm_info("MBOX_SEQ", $sformatf("[Iteration: %0d] Sending datain: 0x%x", datain_ii/4, data), UVM_DEBUG)
         reg_model.mbox_csr_rm.mbox_datain_sem.get();
         reg_model.mbox_csr_rm.mbox_datain.write(reg_sts, uvm_reg_data_t'(data), UVM_FRONTDOOR, reg_model.soc_ifc_APB_map, this, .extension(get_rand_user(PAUSER_PROB_DATAIN)));
         reg_model.mbox_csr_rm.mbox_datain_sem.put();

src/soc_ifc/uvmf_soc_ifc/uvmf_template_output/verification_ip/environment_packages/soc_ifc_env_pkg/sequences/mbox/soc_ifc/soc_ifc_env_mbox_max_sequence.svh

@@ -45,13 +45,12 @@ endclass
 // NOTE:        This should be overridden with real data to write
 //==========================================
 task soc_ifc_env_mbox_max_sequence::mbox_push_datain();
-  int ii;
   uvm_reg_data_t data;
-  for (ii=0; ii < this.mbox_op_rand.dlen; ii+=4) begin
+  for (datain_ii=0; datain_ii < this.mbox_op_rand.dlen; datain_ii+=4) begin
 
     if (!std::randomize(data)) `uvm_error("MBOX_SEQ", "Failed to randomize data")
 
-    `uvm_info("MBOX_SEQ", $sformatf("[Iteration: %0d] Sending datain: 0x%x", ii/4, data), UVM_DEBUG)
+    `uvm_info("MBOX_SEQ", $sformatf("[Iteration: %0d] Sending datain: 0x%x", datain_ii/4, data), UVM_DEBUG)
     reg_model.mbox_csr_rm.mbox_datain_sem.get();
     reg_model.mbox_csr_rm.mbox_datain.write(reg_sts, uvm_reg_data_t'(data), UVM_FRONTDOOR, reg_model.soc_ifc_APB_map, this, .extension(get_rand_user(PAUSER_PROB_DATAIN)));
     reg_model.mbox_csr_rm.mbox_datain_sem.put();

src/soc_ifc/uvmf_soc_ifc/uvmf_template_output/verification_ip/environment_packages/soc_ifc_env_pkg/sequences/mbox/soc_ifc/soc_ifc_env_mbox_min_sequence.svh

@@ -44,13 +44,12 @@ endclass
 // NOTE:        This should be overridden with real data to write
 //==========================================
 task soc_ifc_env_mbox_min_sequence::mbox_push_datain();
-  int ii;
   uvm_reg_data_t data;
-  for (ii=0; ii < this.mbox_op_rand.dlen; ii+=4) begin
+  for (datain_ii=0; datain_ii < this.mbox_op_rand.dlen; datain_ii+=4) begin
 
     if (!std::randomize(data)) `uvm_error("MBOX_SEQ", "Failed to randomize data")
 
-    `uvm_info("MBOX_SEQ", $sformatf("[Iteration: %0d] Sending datain: 0x%x", ii/4, data), UVM_DEBUG)
+    `uvm_info("MBOX_SEQ", $sformatf("[Iteration: %0d] Sending datain: 0x%x", datain_ii/4, data), UVM_DEBUG)
     reg_model.mbox_csr_rm.mbox_datain_sem.get();
     reg_model.mbox_csr_rm.mbox_datain.write(reg_sts, uvm_reg_data_t'(data), UVM_FRONTDOOR, reg_model.soc_ifc_APB_map, this, .extension(get_rand_user(PAUSER_PROB_DATAIN)));
     reg_model.mbox_csr_rm.mbox_datain_sem.put();

src/soc_ifc/uvmf_soc_ifc/uvmf_template_output/verification_ip/environment_packages/soc_ifc_env_pkg/sequences/mbox/soc_ifc/soc_ifc_env_mbox_rand_fw_sequence.svh

@@ -43,22 +43,21 @@ endclass
 
 // This should be overridden with real data to write
 task soc_ifc_env_mbox_rand_fw_sequence::mbox_push_datain();
-    int ii;
     uvm_reg_data_t data;
     uvm_reg_data_t first_size;
     first_size = uvm_reg_data_t'((mbox_op_rand.dlen - 32 - (mbox_op_rand.dlen%8))/2);
     `uvm_info("MBOX_SEQ", $sformatf("Starting FW push_datain, will inject dlen at ii= [0] and at [%0d]", 16 + first_size), UVM_LOW)
-    for (ii=0; ii < this.mbox_op_rand.dlen; ii+=4) begin
-        if (ii == 0) begin
+    for (datain_ii=0; datain_ii < this.mbox_op_rand.dlen; datain_ii+=4) begin
+        if (datain_ii == 0) begin
             data = first_size;
         end
-        else if (ii == (16 + first_size)) begin
+        else if (datain_ii == (16 + first_size)) begin
             data = uvm_reg_data_t'(mbox_op_rand.dlen - first_size);
         end
         else begin
             if (!std::randomize(data)) `uvm_error("MBOX_SEQ", "Failed to randomize data")
         end
-        `uvm_info("MBOX_SEQ", $sformatf("[Iteration: %0d] Sending datain: 0x%x", ii/4, data), UVM_DEBUG)
+        `uvm_info("MBOX_SEQ", $sformatf("[Iteration: %0d] Sending datain: 0x%x", datain_ii/4, data), UVM_DEBUG)
         reg_model.mbox_csr_rm.mbox_datain.write(reg_sts, uvm_reg_data_t'(data), UVM_FRONTDOOR, reg_model.soc_ifc_APB_map, this);
         if (reg_sts != UVM_IS_OK)
             `uvm_error("MBOX_SEQ", "Register access failed (mbox_datain)")

src/soc_ifc/uvmf_soc_ifc/uvmf_template_output/verification_ip/environment_packages/soc_ifc_env_pkg/sequences/mbox/soc_ifc/soc_ifc_env_mbox_rand_pauser_sequence.svh

@@ -39,6 +39,7 @@ class soc_ifc_env_mbox_rand_pauser_sequence extends soc_ifc_env_mbox_sequence_ba
   function new(string name = "" );
     super.new(name);
     this.mbox_sts_exp_error = 1;
+    this.mbox_sts_exp_error_type = EXP_ERR_PROT;
   endfunction
 
 endclass

src/soc_ifc/uvmf_soc_ifc/uvmf_template_output/verification_ip/environment_packages/soc_ifc_env_pkg/sequences/mbox/soc_ifc/soc_ifc_env_mbox_real_fw_sequence.svh

@@ -67,16 +67,15 @@ endtask
 
 // This should be overridden with real data to write
 task soc_ifc_env_mbox_real_fw_sequence::mbox_push_datain();
-    int ii;
     int firmware_end_dw;
     uvm_reg_data_t data;
 
     firmware_end_dw = firmware_end/4 + (firmware_end%4 ? 1 : 0);
 
     `uvm_info("MBOX_SEQ", $sformatf("Starting FW push_datain, ICCM region ends at [0x%x] and DCCM region ends at [0x%x]", firmware_iccm_end, firmware_end), UVM_LOW)
-    for (ii=0; ii < firmware_end_dw; ii++) begin
-        data = uvm_reg_data_t'({fw_img[ii][3],fw_img[ii][2],fw_img[ii][1],fw_img[ii][0]});
-        `uvm_info("MBOX_SEQ", $sformatf("[Iteration: %0d] Sending datain: 0x%x", ii, data), UVM_DEBUG)
+    for (datain_ii=0; datain_ii < firmware_end_dw; datain_ii++) begin
+        data = uvm_reg_data_t'({fw_img[datain_ii][3],fw_img[datain_ii][2],fw_img[datain_ii][1],fw_img[datain_ii][0]});
+        `uvm_info("MBOX_SEQ", $sformatf("[Iteration: %0d] Sending datain: 0x%x", datain_ii, data), UVM_DEBUG)
         reg_model.mbox_csr_rm.mbox_datain_sem.get();
         reg_model.mbox_csr_rm.mbox_datain.write(reg_sts, uvm_reg_data_t'(data), UVM_FRONTDOOR, reg_model.soc_ifc_APB_map, this, .extension(get_rand_user(PAUSER_PROB_DATAIN)));
         reg_model.mbox_csr_rm.mbox_datain_sem.put();

src/soc_ifc/uvmf_soc_ifc/uvmf_template_output/verification_ip/environment_packages/soc_ifc_env_pkg/sequences/mbox/soc_ifc/soc_ifc_env_mbox_reg_axs_invalid_sequence.svh

@@ -38,6 +38,7 @@ class soc_ifc_env_mbox_reg_axs_invalid_sequence extends soc_ifc_env_mbox_sequenc
   function new(string name = "" );
     super.new(name);
     this.mbox_sts_exp_error = 1;
+    this.mbox_sts_exp_error_type = EXP_ERR_PROT;
   endfunction
 
   //==========================================
@@ -144,6 +145,10 @@ task soc_ifc_env_mbox_reg_axs_invalid_sequence::mbox_do_random_reg_write(process
         `uvm_info("MBOX_SEQ", {"Performing random register access to ", mbox_regs[rand_idx].get_name()}, UVM_LOW)
         mbox_regs[rand_idx].write(local_reg_sts, rand_wr_data, UVM_FRONTDOOR, reg_model.soc_ifc_APB_map, this, .extension(local_apb_user_obj));
         report_reg_sts(local_reg_sts, mbox_regs[rand_idx].get_name(), local_apb_user_obj);
+        // mainline flow was doing datain writes and was about to write the expected_resp_dlen value
+        if (datain_ii == 0) begin
+            this.mbox_sts_exp_error_type = EXP_ERR_RSP_DLEN;
+        end
     end
     else begin
         `uvm_info("MBOX_SEQ", {"Performing random register access to ", mbox_regs[rand_idx].get_name()}, UVM_LOW)

src/soc_ifc/uvmf_soc_ifc/uvmf_template_output/verification_ip/environment_packages/soc_ifc_env_pkg/sequences/mbox/soc_ifc/soc_ifc_env_mbox_rom_fw_sequence.svh

@@ -54,19 +54,18 @@ endtask
 
 // This should be overridden with real data to write
 task soc_ifc_env_mbox_rom_fw_sequence::mbox_push_datain();
-    int ii;
     int firmware_end_dw;
     uvm_reg_data_t data;
 
     firmware_end_dw = this.mbox_op_rand.dlen / 4 + (this.mbox_op_rand.dlen%4 ? 1 : 0);
 
     `uvm_info("MBOX_SEQ", $sformatf("Starting FW push_datain. Size: [0x%x] dwords", firmware_end_dw), UVM_LOW)
-    for (ii=0; ii < firmware_end_dw; ii++) begin
-        data = uvm_reg_data_t'({fw_img[ii][3],fw_img[ii][2],fw_img[ii][1],fw_img[ii][0]});
-        if (ii < 10)
-            `uvm_info("MBOX_SEQ", $sformatf("[Iteration: %0d] Sending datain: 0x%x", ii, data), UVM_LOW)
+    for (datain_ii=0; datain_ii < firmware_end_dw; datain_ii++) begin
+        data = uvm_reg_data_t'({fw_img[datain_ii][3],fw_img[datain_ii][2],fw_img[datain_ii][1],fw_img[datain_ii][0]});
+        if (datain_ii < 10)
+            `uvm_info("MBOX_SEQ", $sformatf("[Iteration: %0d] Sending datain: 0x%x", datain_ii, data), UVM_LOW)
         else
-            `uvm_info("MBOX_SEQ", $sformatf("[Iteration: %0d] Sending datain: 0x%x", ii, data), UVM_DEBUG)
+            `uvm_info("MBOX_SEQ", $sformatf("[Iteration: %0d] Sending datain: 0x%x", datain_ii, data), UVM_DEBUG)
         reg_model.mbox_csr_rm.mbox_datain_sem.get();
         reg_model.mbox_csr_rm.mbox_datain.write(reg_sts, uvm_reg_data_t'(data), UVM_FRONTDOOR, reg_model.soc_ifc_APB_map, this, .extension(get_rand_user(PAUSER_PROB_DATAIN)));
         reg_model.mbox_csr_rm.mbox_datain_sem.put();

src/soc_ifc/uvmf_soc_ifc/uvmf_template_output/verification_ip/environment_packages/soc_ifc_env_pkg/sequences/mbox/soc_ifc/soc_ifc_env_mbox_sequence_base.svh

@@ -43,6 +43,15 @@ class soc_ifc_env_mbox_sequence_base extends soc_ifc_env_sequence_base #(.CONFIG
   rand bit retry_failed_reg_axs;
   bit mbox_sts_exp_error = 0; // Indicates this sequence will inject an error, which should manifest as a CMD_FAILURE response status
                               // TODO make this more comprehensive/intelligent about randomized error injection
+  enum bit [4:0] {
+      EXP_ERR_PROT,
+      EXP_ERR_ECC_UNC,
+      EXP_ERR_RSP_DLEN,
+      EXP_ERR_NONE
+  } mbox_sts_exp_error_type = EXP_ERR_NONE; // Known error types to expect/handle from test sequences
+  int datain_ii = MBOX_SIZE_BYTES/4; // Initialize to max value. This iterator is reset in mbox_push_datain for loop, but is
+                                     // evaluated against specific offsets for some error checking cases. So give it an
+                                     // unambiguously invalid init value prior to use.
 
   typedef enum byte {
     DLY_ZERO,
@@ -428,19 +437,18 @@ endtask
 // NOTE:        This should be overridden with real data to write
 //==========================================
 task soc_ifc_env_mbox_sequence_base::mbox_push_datain();
-    int ii;
     uvm_reg_data_t data;
-    for (ii=0; ii < this.mbox_op_rand.dlen; ii+=4) begin
-        if (ii == 0) begin
+    for (datain_ii=0; datain_ii < this.mbox_op_rand.dlen; datain_ii+=4) begin
+        if (datain_ii == 0) begin
             data = uvm_reg_data_t'(mbox_op_rand.dlen - 8);
         end
-        else if (ii == 4) begin
+        else if (datain_ii == 4) begin
             data = uvm_reg_data_t'(mbox_resp_expected_dlen);
         end
         else begin
             if (!std::randomize(data)) `uvm_error("MBOX_SEQ", "Failed to randomize data")
         end
-        `uvm_info("MBOX_SEQ", $sformatf("[Iteration: %0d] Sending datain: 0x%x", ii/4, data), UVM_DEBUG)
+        `uvm_info("MBOX_SEQ", $sformatf("[Iteration: %0d] Sending datain: 0x%x", datain_ii/4, data), UVM_DEBUG)
         reg_model.mbox_csr_rm.mbox_datain_sem.get();
         reg_model.mbox_csr_rm.mbox_datain.write(reg_sts, uvm_reg_data_t'(data), UVM_FRONTDOOR, reg_model.soc_ifc_APB_map, this, .extension(get_rand_user(PAUSER_PROB_DATAIN)));
         reg_model.mbox_csr_rm.mbox_datain_sem.put();
@@ -565,8 +573,11 @@ task soc_ifc_env_mbox_sequence_base::mbox_poll_status();
         end
     end
     else if (data == CMD_FAILURE) begin
-        if (sts_rsp_count > 0 && soc_ifc_status_agent_rsp_seq.rsp.cptra_error_non_fatal_intr_pending && mbox_sts_exp_error) begin
-            `uvm_info("MBOX_SEQ", $sformatf("Unexpected mailbox status [%p] likely is the result of a spurious reg access injection specifically intended to cause a protocol violation or a mailbox SRAM double bit flip", data), UVM_HIGH)
+        if (sts_rsp_count > 0 && soc_ifc_status_agent_rsp_seq.rsp.cptra_error_non_fatal_intr_pending && mbox_sts_exp_error && mbox_sts_exp_error_type inside {EXP_ERR_PROT, EXP_ERR_ECC_UNC}) begin
+            `uvm_info("MBOX_SEQ", $sformatf("Unexpected mailbox status [%p] likely is the result of a spurious reg access injection specifically intended to cause a protocol violation or a mailbox SRAM double bit flip. Expected err type: %p", data, mbox_sts_exp_error_type), UVM_HIGH)
+        end
+        else if (mbox_sts_exp_error && (mbox_sts_exp_error_type == EXP_ERR_RSP_DLEN)) begin
+            `uvm_info("MBOX_SEQ", $sformatf("Mailbox status [%p] is expected due to spurious reg access injection against mbox_datain specifically intended to cause a protocol violation. Expected err type: %p", data, mbox_sts_exp_error_type), UVM_HIGH)
         end
         else begin
             `uvm_error("MBOX_SEQ", $sformatf("Received mailbox status %p unexpectedly, since there is no pending non_fatal error interrupt (or error injection was unexpected)", data))