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Several improvements to L1 tracking code #46360

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Commits on Oct 29, 2024

  1. Configuration menu
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  2. auto format

    tomalin committed Oct 29, 2024
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  3. auto code format

    tomalin committed Oct 29, 2024
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  4. Add truncation in TrackletProcessorDisplaced (#293)

    * include truncation in TrackletProcessorDisplaced
    
    * code formatting
    
    * include separate truncation for TP and TPD
    cgsavard authored and tomalin committed Oct 29, 2024
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  5. All-combined extended wiring (#292)

    * Initial commit
    
    * Separated ivmte and bins, but not correct yet
    
    * Allow combined_ to be set for extended tracking.
    
    * Logic for bins updated
    
    * Revert lutwidthtab_ and use lutwidthtabextended_ for extended tracking.
    
    * Set ivmte to zero by default and revert change to old VMRouter.
    
    * Updated assert.
    
    * Initialize LUTs from VMRouter.
    
    * Use LUT values from VMRouter for triplet seeds.
    
    * Added stubposition and made vmstubmem a vector of vectors.
    
    * Added a combined flag to addVMStub.
    
    * Use stubposition to get lutwidth.
    
    * Skip disk 2S stubs only for pair seeds.
    
    * Added some comments.
    
    * Added assert on melutOld.
    
    * Initialize in same order as declared in header file.
    
    * Code format.
    
    * Added method to return nbits_.
    
    * Removed magic numbers.
    
    * Added comments.
    
    * Use new wiring with all combined modules.
    
    * Temporarily added data directory from here:
    https://github.com/aehart/L1Trigger-TrackFindingTracklet/tree/new_extended_wiring
    
    ---------
    
    Co-authored-by: Jannicke Pearkes <[email protected]>
    2 people authored and tomalin committed Oct 29, 2024
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  7. style change

    tomalin committed Oct 29, 2024
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  8. Fix GlobalTag problem

    tomalin committed Oct 29, 2024
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  9. Clean up TrackletProcessorDisplaced (#294)

    * clean up use of layerdisk and seed
    
    * remove unnecessary and redundant code
    
    * remove more redundant code
    
    * clean up some bit operation logic
    
    * more clean-up and additional checks added
    
    * more clean up and add comments
    
    * fixing merge conflicts after TPD truncation added
    
    * remove additional rz check, fix for loop counter bug
    
    * include combined flag in VMRtable
    
    * minor PR comments
    
    * remove more useless code
    cgsavard authored and tomalin committed Oct 29, 2024
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  10. scram b code-format with latest CMSSW version (#295)

    Merging as trivial code-format change.
    tomalin committed Oct 29, 2024
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  12. Avoided copy of vector

    tomalin committed Oct 29, 2024
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