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Merge pull request #145 from comparch-security/fix-regression
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Simplify the code implementation of parallel_regression
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wsong83 authored Sep 10, 2024
2 parents 9647690 + 7917a6c commit 647926b
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Showing 2 changed files with 33 additions and 22 deletions.
30 changes: 15 additions & 15 deletions util/parallel_regression.hpp
Original file line number Diff line number Diff line change
Expand Up @@ -53,7 +53,7 @@ class DataQueue
bool check(uint64_t caddr, const CMDataBase* data){
assert(caddr == addr);
std::unique_lock lk(*mtx);
if(data_deque.size() == 0) return true;
if(data_deque.size() == 0 || data->read(0) == 0) return true;
for(auto d : data_deque){
if(d.read(0) == data->read(0)) return true;
}
Expand All @@ -72,7 +72,7 @@ class ParallelRegressionSupport


template<int NC, bool EnIC, bool TestFlush, unsigned int PAddrN, unsigned int SAddrN, typename DT>
class ParallelRegressionGen : public RegressionGen<NC, EnIC, TestFlush, PAddrN, SAddrN, DT>, public ParallelRegressionSupport
class ParallelRegressionGen : public RegressionGen<NC, EnIC, TestFlush, PAddrN, SAddrN, DT>
{
typedef RegressionGen<NC, EnIC, TestFlush, PAddrN, SAddrN, DT> ReT;
protected:
Expand Down Expand Up @@ -107,6 +107,7 @@ class ParallelRegressionGen : public RegressionGen<NC, EnIC, TestFlush, PAddrN,
virtual ~ParallelRegressionGen() {
for(auto dq : dq_pool) delete dq;
for(auto m : xact_mutux) delete m;
for(auto c : xact_cond) delete c;
}

virtual void xact_queue_add(int test_num){
Expand All @@ -115,9 +116,8 @@ class ParallelRegressionGen : public RegressionGen<NC, EnIC, TestFlush, PAddrN,
act.core = hasher(gi++) % NC;
while(num < test_num){
auto [addr, data, rw, core, ic, flush] = gen();
//int index = addr_map[addr];
Data64B d;
d.copy(data);
if constexpr (!C_VOID<DT>) d.copy(data);
act = cache_xact{rw, core, ic, flush, addr, d};
if(flush == 2){ // share instruction flush
for(int i = 0; i < NC; i++){
Expand All @@ -141,8 +141,8 @@ class ParallelRegressionGen : public RegressionGen<NC, EnIC, TestFlush, PAddrN,
dq->write(data);
}

static void cache_producer(int test_num, ParallelRegressionSupport* pgr){
pgr->xact_queue_add(test_num);
void cache_producer(int test_num){
xact_queue_add(test_num);
}

virtual std::pair<bool, cache_xact> get_xact(int core){
Expand All @@ -164,37 +164,37 @@ class ParallelRegressionGen : public RegressionGen<NC, EnIC, TestFlush, PAddrN,
return true;
}

static void cache_server(int core, ParallelRegressionSupport* prg, std::vector<CoreInterfaceBase *>* core_inst, std::vector<CoreInterfaceBase *>* core_data, bool* exit)
void cache_server(int core, std::vector<CoreInterfaceBase *>* core_inst, std::vector<CoreInterfaceBase *>* core_data, bool* exit)
{
while(true){
auto act = prg->get_xact(core);
auto act = get_xact(core);
if(*exit && !act.first) break;
else if(act.first){
auto [rw, act_core, ic, flush, addr, data] = act.second;
if(flush){
if(flush == 3) (*core_data)[core]->flush(addr, nullptr);
else (*core_inst)[core]->flush(addr, nullptr);
if(rw){
(*core_data)[core]->write(addr, &data, nullptr);
prg->write_dq(addr, &data);
if constexpr (!C_VOID<DT>) { write_dq(addr, &data); (*core_data)[core]->write(addr, &data, nullptr); }
else (*core_data)[core]->write(addr, nullptr, nullptr);
}
} else if(rw){
(*core_data)[core]->write(addr, &data, nullptr);
prg->write_dq(addr, &data);
if constexpr (!C_VOID<DT>) { write_dq(addr, &data); (*core_data)[core]->write(addr, &data, nullptr); }
else (*core_data)[core]->write(addr, nullptr, nullptr);
}else{
auto rdata = ic ? (*core_inst)[core]->read(addr, nullptr) : (*core_data)[core]->read(addr, nullptr);
prg->check(addr, rdata);
if constexpr (!C_VOID<DT>) check(addr, rdata);
}
}
}
}

void run(int test_num, std::vector<CoreInterfaceBase *>* core_inst, std::vector<CoreInterfaceBase *>* core_data){
std::thread add_thread(cache_producer, test_num, this);
std::thread add_thread(&ParallelRegressionGen::cache_producer, this, test_num);
std::vector<std::thread> server_thread;
bool exit = false;
for(int i = 0; i < NC; i++){
server_thread.emplace_back(cache_server, i, this, core_inst, core_data, &exit);
server_thread.emplace_back(&ParallelRegressionGen::cache_server, this, i, core_inst, core_data, &exit);
}
add_thread.join();
exit = true;
Expand Down
25 changes: 18 additions & 7 deletions util/regression.hpp
Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,7 @@ class RegressionGen
const unsigned int total;
std::vector<uint64_t> addr_pool; // random addresses
std::unordered_map<uint64_t, int> addr_map;
std::vector<DT> data_pool; // data copy
std::vector<DT* > data_pool; // data copy
std::vector<bool> wflag; // whether written
std::vector<bool> iflag; // belong to instruction

Expand All @@ -37,7 +37,10 @@ class RegressionGen
: gi(703), hasher(1201), total(NC*PAddrN+SAddrN)
{
addr_pool.resize(total);
data_pool.resize(total);
if constexpr (!C_VOID<DT>) {
data_pool.resize(total);
for(auto &d:data_pool) d = new DT();
}
wflag.resize(total);
iflag.resize(total);
for(unsigned int i=0; i<total; i++) {
Expand All @@ -53,6 +56,10 @@ class RegressionGen
}
}

~RegressionGen(){
if constexpr (!C_VOID<DT>) for(auto d:data_pool) delete d;
}

unsigned int locality_scale(unsigned int num, unsigned int mod, double rate) {
num %= mod;
double factor = (double)(num) / mod;
Expand All @@ -70,7 +77,8 @@ class RegressionGen
PAddrN*NC + locality_scale(hasher(gi++), SAddrN, 0.2) :
PAddrN*core + locality_scale(hasher(gi++), PAddrN, 0.2) ;
uint64_t addr = addr_pool[index];
DT *data = &(data_pool[index]);
DT *data;
if constexpr (!C_VOID<DT>) data = data_pool[index];
auto ran_num = hasher(gi++);
bool rw = 0 == (ran_num & 0x11); // 25% write
int flush = TestFlush && (0 == (ran_num & 0x17)) ? 3 : 0; // 25% of write is flush
Expand All @@ -88,7 +96,7 @@ class RegressionGen
}

if(rw) {
data->write(0, hasher(gi++), 0xffffffffffffffffull);
if constexpr (!C_VOID<DT>) data->write(0, hasher(gi++), 0xffffffffffffffffull);
wflag[index] = true;
}

Expand All @@ -97,9 +105,12 @@ class RegressionGen

bool check(uint64_t addr, const CMDataBase *data) {
assert(addr_map.count(addr));
int index = addr_map[addr];
assert(data_pool[index].read(0) == data->read(0));
return data_pool[index].read(0) == data->read(0);
if constexpr (!C_VOID<DT>) {
int index = addr_map[addr];
assert(data_pool[index]->read(0) == data->read(0));
return data_pool[index]->read(0) == data->read(0);
} else
return true;
}

bool run(uint64_t TestN, std::vector<CoreInterfaceBase *>& core_inst, std::vector<CoreInterfaceBase *>& core_data) {
Expand Down

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