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partially revert the previous PR and hopefully do destructors properly this time #130

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Aug 12, 2024
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4 changes: 2 additions & 2 deletions Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -13,10 +13,10 @@ ifeq ($(MODE), release)
CXXFLAGS = $(CXXSTD) -O3 -DNDEBUG -I. -fPIC
REGRESS_LD_FLAGS =
else ifeq ($(MODE), debug)
CXXFLAGS = $(CXXSTD) -O0 -g -I. -fPIC -DCHECK_MULTI
CXXFLAGS = $(CXXSTD) -O0 -g -I. -Wall -Werror -fPIC -DCHECK_MULTI
REGRESS_LD_FLAGS =
else ifeq ($(MODE), debug-multi)
CXXFLAGS = $(CXXSTD) -O0 -g -I. -fPIC -DCHECK_MULTI -DBOOST_STACKTRACE_LINK -DBOOST_STACKTRACE_USE_BACKTRACE
CXXFLAGS = $(CXXSTD) -O0 -g -I. -Wall -fPIC -DCHECK_MULTI -DBOOST_STACKTRACE_LINK -DBOOST_STACKTRACE_USE_BACKTRACE
REGRESS_LD_FLAGS = -lboost_stacktrace_backtrace -ldl -lbacktrace
else
CXXFLAGS = $(CXXSTD) -O2 -I. -fPIC
Expand Down
5 changes: 3 additions & 2 deletions cache/cache.hpp
Original file line number Diff line number Diff line change
Expand Up @@ -26,6 +26,7 @@ class CacheArrayBase

public:
CacheArrayBase(std::string name = "") : name(name) {}
virtual ~CacheArrayBase() = default;

virtual bool hit(uint64_t addr, uint32_t s, uint32_t *w) const = 0;
virtual CMMetadataCommon * get_meta(uint32_t s, uint32_t w) = 0;
Expand Down Expand Up @@ -73,7 +74,7 @@ class CacheArrayNorm : public CacheArrayBase
if constexpr (EnMT) cache_set_state.resize(nset);
}

virtual ~CacheArrayNorm() {
virtual ~CacheArrayNorm() override {
for(auto m:meta) delete m;
if constexpr (!C_VOID<DT>) for(auto d:data) delete d;
}
Expand Down Expand Up @@ -119,7 +120,7 @@ class CacheArrayNorm : public CacheArrayBase
if constexpr (EnMT) {
while(true) {
auto state = cache_set_state[s].read();
assert(state == state | prio);
assert(state == (state | prio));
if(cache_set_state[s].swap(state, state & (~prio), true)) break;
}
}
Expand Down
2 changes: 2 additions & 0 deletions cache/coh_policy.hpp
Original file line number Diff line number Diff line change
Expand Up @@ -40,6 +40,8 @@ class CohPolicyBase {
public:
friend CoherentCacheBase; // deferred assignment for cache

virtual ~CohPolicyBase() = default;

__always_inline void connect(CohPolicyBase *policy) { outer = policy ? policy : this; } // memory does not use policy and returns nullptr

// message type
Expand Down
5 changes: 2 additions & 3 deletions cache/coherence.hpp
Original file line number Diff line number Diff line change
Expand Up @@ -44,6 +44,7 @@ class OuterCohPortBase

public:
OuterCohPortBase(policy_ptr policy) : policy(policy) {}
virtual ~OuterCohPortBase() = default;

void connect(CohMasterBase *h, std::pair<int32_t, policy_ptr> info) { coh = h; coh_id = info.first; policy->connect(info.second.get()); }

Expand Down Expand Up @@ -71,6 +72,7 @@ class InnerCohPortBase
policy_ptr policy; // the coherence policy
public:
InnerCohPortBase(policy_ptr policy) : policy(policy) {}
virtual ~InnerCohPortBase() = default;

virtual std::pair<uint32_t, policy_ptr> connect(CohClientBase *c, bool uncached = false) {
if(uncached) {
Expand Down Expand Up @@ -151,7 +153,6 @@ class OuterCohPortT : public OPUC
using OuterCohPortBase::policy;
public:
OuterCohPortT(policy_ptr policy) : OPUC(policy) {}
virtual ~OuterCohPortT() {}

virtual std::pair<bool,bool> probe_resp(uint64_t addr, CMMetadataBase *meta_outer, CMDataBase *data_outer, coh_cmd_t outer_cmd, uint64_t *delay) override {
uint32_t ai, s, w;
Expand Down Expand Up @@ -374,7 +375,6 @@ class InnerCohPortT : public IPUC
using InnerCohPortBase::policy;
public:
InnerCohPortT(policy_ptr policy) : IPUC(policy) {}
virtual ~InnerCohPortT() {}

virtual std::pair<bool, bool> probe_req(uint64_t addr, CMMetadataBase *meta, CMDataBase *data, coh_cmd_t cmd, uint64_t *delay) override {
bool hit = false, writeback = false;
Expand Down Expand Up @@ -550,7 +550,6 @@ class CoherentCacheNorm : public CoherentCacheBase
public:
CoherentCacheNorm(policy_ptr policy, std::string name = "")
: CoherentCacheBase(new CacheT(name), new OuterT(policy), new InnerT(policy), policy, name) {}
virtual ~CoherentCacheNorm() override {}
};

/////////////////////////////////
Expand Down
3 changes: 0 additions & 3 deletions cache/exclusive.hpp
Original file line number Diff line number Diff line change
Expand Up @@ -131,7 +131,6 @@ class CacheSkewedExclusive : public CacheSkewed<IW, NW, P, MT, DT, IDX, RPC, DLY
DRPC ext_replacer[P];
public:
CacheSkewedExclusive(std::string name = "") : CacheT(name, 0, (EnDir ? DW : 0)) {}
virtual ~CacheSkewedExclusive() override {}

virtual bool replace(uint64_t addr, uint32_t *ai, uint32_t *s, uint32_t *w, uint16_t prio, unsigned int genre = 0) override {
if constexpr (!EnDir) CacheT::replace(addr, ai, s, w, prio, 0);
Expand Down Expand Up @@ -556,7 +555,6 @@ class ExclusiveOuterCohPortBroadcastT : public OPUC
using OuterCohPortBase::coh_id;
public:
ExclusiveOuterCohPortBroadcastT(policy_ptr policy) : OPUC(policy) {}
virtual ~ExclusiveOuterCohPortBroadcastT() {}

virtual std::pair<bool, bool> probe_resp(uint64_t addr, CMMetadataBase *meta_outer, CMDataBase *data_outer, coh_cmd_t outer_cmd, uint64_t *delay) override {
uint32_t ai, s, w;
Expand Down Expand Up @@ -608,7 +606,6 @@ class ExclusiveOuterCohPortDirectoryT : public OPUC
using OuterCohPortBase::coh_id;
public:
ExclusiveOuterCohPortDirectoryT(policy_ptr policy) : OPUC(policy) {}
virtual ~ExclusiveOuterCohPortDirectoryT() {}

virtual std::pair<bool, bool> probe_resp(uint64_t addr, CMMetadataBase *meta_outer, CMDataBase *data_outer, coh_cmd_t outer_cmd, uint64_t *delay) override {
uint32_t ai, s, w;
Expand Down
2 changes: 1 addition & 1 deletion cache/memory.hpp
Original file line number Diff line number Diff line change
Expand Up @@ -75,7 +75,7 @@ template<typename DT, typename DLY, bool EnMon = false, bool EnMT = false>
monitors = new CacheMonitorImp<DLY, EnMon>(id);
}

virtual ~SimpleMemoryModel() {
virtual ~SimpleMemoryModel() override {
delete monitors;
}

Expand Down
6 changes: 4 additions & 2 deletions cache/metadata.hpp
Original file line number Diff line number Diff line change
Expand Up @@ -9,6 +9,7 @@
class CMDataBase
{
public:
virtual ~CMDataBase() = default;
// implement a totally useless base class
virtual void reset() {} // reset the data block, normally unnecessary
virtual uint64_t read(unsigned int index) const { return 0; } // read a 64b data
Expand All @@ -27,7 +28,7 @@ class Data64B : public CMDataBase
public:
Data64B() : data{0} {}

virtual void reset() override { for(auto d:data) d = 0; }
virtual void reset() override { for(auto &d:data) d = 0; }
virtual uint64_t read(unsigned int index) const override { return data[index]; }
virtual void write(unsigned int index, uint64_t wdata, uint64_t wmask) override { data[index] = (data[index] & (~wmask)) | (wdata & wmask); }
virtual void write(uint64_t *wdata) override { for(int i=0; i<8; i++) data[i] = wdata[i]; }
Expand All @@ -47,6 +48,7 @@ class Data64B : public CMDataBase
class CMMetadataCommon
{
public:
virtual ~CMMetadataCommon() = default;
virtual void to_invalid() = 0; // change state to invalid
virtual bool is_valid() const = 0;
virtual bool match(uint64_t addr) const = 0;
Expand Down Expand Up @@ -261,7 +263,7 @@ class MetaLock : public MT {

virtual void unlock() override {
#ifdef CHECK_MULTI
uint64_t thread_id = global_lock_checker->thread_id();
//uint64_t thread_id = global_lock_checker->thread_id();
assert(locked.load() != 0 || 0 ==
"This cache line has already be unlocked and should not be unlocked again!");
locked = 0;
Expand Down
2 changes: 0 additions & 2 deletions cache/mirage.hpp
Original file line number Diff line number Diff line change
Expand Up @@ -111,8 +111,6 @@ class MirageCache : public CacheSkewed<IW, NW+EW, P, MT, void, MIDX, MRPC, DLY,
}
}

virtual ~MirageCache() override {}

__always_inline CMDataBase *get_data(uint32_t ai, uint32_t s, uint32_t w) {
auto pointer = static_cast<MT *>(this->access(ai, s, w))->pointer();
return arrays[P]->get_data(pointer.first, pointer.second);
Expand Down
4 changes: 3 additions & 1 deletion cache/replace.hpp
Original file line number Diff line number Diff line change
Expand Up @@ -47,6 +47,8 @@ class ReplaceFuncBase
for (auto &s: free_map) s.resize(NW, true);
}

virtual ~ReplaceFuncBase() = default;

__always_inline uint32_t get_free_num(uint32_t s) const { return free_num[s]; }

virtual void replace(uint32_t s, uint32_t *w) {
Expand Down Expand Up @@ -217,7 +219,7 @@ class ReplaceRandom : public ReplaceFuncBase<EF>

public:
ReplaceRandom() : RPT(1ul << IW, NW), loc_random(cm_alloc_rand32()) {}
virtual ~ReplaceRandom() { delete loc_random; }
virtual ~ReplaceRandom() override { delete loc_random; }

virtual void access(uint32_t s, uint32_t w, bool demand_acc, bool prefetch) override {
if((int32_t)w == alloc_map[s] && demand_acc) alloc_map[s] = -1;
Expand Down
1 change: 0 additions & 1 deletion util/cache_type.hpp
Original file line number Diff line number Diff line change
Expand Up @@ -183,7 +183,6 @@ inline auto cache_multi_thread_type_compile(int size, const std::string& name_pr
constexpr bool isDir = std::is_same_v<MBT, MetadataDirectoryBase>;
constexpr bool isMESI = std::is_same_v<CPT<MetadataDirectoryBase, false, true>, MESIPolicy<MetadataDirectoryBase, false, true> >;
constexpr bool isMSI = std::is_same_v<CPT<MetadataDirectoryBase, false, true>, MSIPolicy<MetadataDirectoryBase, false, true> >;
constexpr bool isMI = std::is_same_v<CPT<MetadataDirectoryBase, false, true>, MIPolicy<MetadataDirectoryBase, false, true> >;

// MESI
typedef MetadataMESIDirectory<48, IW, IW+6> mesi_metadata_type;
Expand Down
7 changes: 5 additions & 2 deletions util/monitor.hpp
Original file line number Diff line number Diff line change
Expand Up @@ -19,6 +19,8 @@ class CMMetadataBase;
class MonitorBase
{
public:
virtual ~MonitorBase() = default;

// standard functions to supprt a type of monitoring
virtual bool attach(uint64_t cache_id) = 0; // decide whether to attach the mointor to this cache
virtual void read(uint64_t cache_id, uint64_t addr, int32_t ai, int32_t s, int32_t w, bool hit, const CMMetadataBase *meta, const CMDataBase *data) = 0;
Expand All @@ -42,8 +44,8 @@ class MonitorContainerBase
std::set<MonitorBase *> monitors; // performance moitors

public:

MonitorContainerBase(uint32_t id) : id(id) {}
virtual ~MonitorContainerBase() = default;

virtual void attach_monitor(MonitorBase *m) = 0;

Expand Down Expand Up @@ -85,7 +87,7 @@ class CacheMonitorImp : public MonitorContainerBase
if constexpr (!C_VOID<DLY>) timer = new DLY();
}

virtual ~CacheMonitorImp() {
virtual ~CacheMonitorImp() override {
if constexpr (!C_VOID<DLY>) delete timer;
}

Expand Down Expand Up @@ -258,6 +260,7 @@ class SimpleTracerMT : public SimpleTracer
SimpleTracerMT(bool cd = false): SimpleTracer(cd) {
print_thread = std::thread(&PrintPool::print, globalPrinter);
}

virtual void stop() { globalPrinter->stop(); print_thread.join(); }
};

Expand Down
8 changes: 4 additions & 4 deletions util/parallel_regression.hpp
Original file line number Diff line number Diff line change
Expand Up @@ -36,9 +36,9 @@ class DataQueue
uint64_t addr;
std::deque<Data64B> data_deque;
std::mutex* mtx;
int NC;
unsigned int NC;
public:
DataQueue(int NCore, uint64_t waddr) : NC(NCore), addr(waddr) {
DataQueue(int NCore, uint64_t waddr) : addr(waddr), NC(NCore) {
mtx = new std::mutex();
}
virtual ~DataQueue() { delete mtx; }
Expand Down Expand Up @@ -93,7 +93,7 @@ class ParallelRegressionGen : public RegressionGen<NC, EnIC, TestFlush, PAddrN,
ParallelRegressionGen() {
xact_queue.resize(NC);
dq_pool.resize(addr_pool.size());
for(int i = 0; i < addr_pool.size(); i++){
for(unsigned int i = 0; i < addr_pool.size(); i++){
dq_pool[i] = new DataQueue(NC, addr_pool[i]);
}
xact_mutux.resize(NC);
Expand All @@ -115,7 +115,7 @@ class ParallelRegressionGen : public RegressionGen<NC, EnIC, TestFlush, PAddrN,
act.core = hasher(gi++) % NC;
while(num < test_num){
auto [addr, data, rw, core, ic, flush] = gen();
int index = addr_map[addr];
//int index = addr_map[addr];
Data64B d;
d.copy(data);
act = cache_xact{rw, core, ic, flush, addr, d};
Expand Down
1 change: 1 addition & 0 deletions util/random.hpp
Original file line number Diff line number Diff line change
Expand Up @@ -8,6 +8,7 @@
template<typename rv_type>
class RandomGen {
public:
virtual ~RandomGen() = default;
virtual rv_type operator ()() = 0;
virtual void seed(uint64_t s) = 0;
};
Expand Down
4 changes: 2 additions & 2 deletions util/regression.hpp
Original file line number Diff line number Diff line change
Expand Up @@ -40,7 +40,7 @@ class RegressionGen
data_pool.resize(total);
wflag.resize(total);
iflag.resize(total);
for(int i=0; i<total; i++) {
for(unsigned int i=0; i<total; i++) {
auto addr = hasher(gi++) & addr_mask;
while(addr_map.count(addr)) addr = hasher(gi++) & addr_mask;
addr_pool[i] = addr;
Expand Down Expand Up @@ -103,7 +103,7 @@ class RegressionGen
}

bool run(uint64_t TestN, std::vector<CoreInterfaceBase *>& core_inst, std::vector<CoreInterfaceBase *>& core_data) {
for(int i=0; i<TestN; i++) {
for(unsigned int i=0; i<TestN; i++) {
auto [addr, wdata, rw, nc, ic, flush] = gen();
if(flush) {
if(flush == 3) core_data[nc]->flush(addr, nullptr);
Expand Down
4 changes: 2 additions & 2 deletions util/statistics.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -194,14 +194,14 @@ void shape_distribution(const std::vector<double>& cdfs, std::vector<uint64_t> &
auto ssize = sample.size();

std::vector<int> index(dsize, 0);
for(int i=0; i<dsize; i++) {
for(unsigned int i=0; i<dsize; i++) {
index[i] = ssize * cdfs[i] - 1;
if(index[i] < 0) index[i] = 0;
}

std::sort(sample.begin(), sample.end());

for(int i=0; i<dsize; i++) dist[i] = sample[index[i]];
for(unsigned int i=0; i<dsize; i++) dist[i] = sample[index[i]];
}

double kl_divergence_with_uniform(const std::vector<uint64_t>& sample) {
Expand Down
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