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core: riscv: Disable traps by clearing XIE CSR #618

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core: riscv: Disable traps by clearing XIE CSR

core: riscv: Disable traps by clearing XIE CSR #618

Triggered via push November 4, 2024 16:17
@gagachanggagachang
pushed 3b5e85c
dev-riscv-improve-20241014
Status Success
Total duration 1h 10m 59s
Artifacts –

ci.yml

on: push
Code style
1m 3s
Code style
make (multi-platform)
51m 45s
make (multi-platform)
make check (QEMUv7)
44m 20s
make check (QEMUv7)
make check (QEMUv8)
1h 10m
make check (QEMUv8)
make check (QEMUv8, Clang)
50m 9s
make check (QEMUv8, Clang)
make check (QEMUv8, Xen)
1h 3m
make check (QEMUv8, Xen)
make check (QEMUv8, Xen FF-A)
1h 4m
make check (QEMUv8, Xen FF-A)
make check (QEMUv8, Hafnium)
49m 24s
make check (QEMUv8, Hafnium)
make check (QEMUv8, BTI+MTE+PAC)
49m 2s
make check (QEMUv8, BTI+MTE+PAC)
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