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Merge pull request #2431 from dd-baoshan/cv32e40p/dev
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Add esle clause on assertion
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MikeOpenHWGroup authored May 14, 2024
2 parents b73c534 + abbece7 commit 57e4113
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Showing 3 changed files with 8 additions and 1 deletion.
Original file line number Diff line number Diff line change
Expand Up @@ -990,6 +990,10 @@ class cv32e40p_xpulp_hwloop_base_stream extends cv32e40p_xpulp_rand_stream;
if(no_fence)
riscv_exclude_instr = {riscv_exclude_instr, FENCE, FENCE_I};

if(cfg.sp != SP) begin // prevent corruption due to sw(sp)
riscv_exclude_instr = {riscv_exclude_instr, C_SWSP, C_FSWSP};
end

`uvm_info("cv32e40p_xpulp_hwloop_base_stream",
$sformatf("insert_rand_instr- Number of Random instr to generate= %0d",num_rand_instr),
UVM_HIGH)
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3 changes: 2 additions & 1 deletion cv32e40p/tb/uvmt/uvmt_cv32e40p_tb_ifs.sv
Original file line number Diff line number Diff line change
Expand Up @@ -607,7 +607,8 @@ interface uvmt_cv32e40p_cov_if
detect_apu_rvalid = 1;
end
else begin
assert (clk_cycle_window <= MAX_FP_XACT_CYCLE);
assert (clk_cycle_window <= MAX_FP_XACT_CYCLE)
else `uvm_error("uvmt_cv32e40p_cov_if", $sformatf("clk_cycle_window (%0d) > MAX_FP_XACT_CYCLE (%0d)", clk_cycle_window, MAX_FP_XACT_CYCLE));
if (apu_req && apu_gnt && apu_rvalid_i && detect_apu_rvalid) begin : IS_0_CYC_FPU
clk_cycle_window = 0;
detect_apu_rvalid = 0;
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Original file line number Diff line number Diff line change
Expand Up @@ -3685,6 +3685,8 @@ _fsgnjx_jr31: fsgnjx.s x31, x31, x31
flt.s x1, x15, x15
cv.lbu x7, (x1), 4
fle.s x1, x7, x7
cv.lbu x6, (x1), 4
fdiv.s x1, x6, x6
cv.lbu x9, (x1), 4
fdiv.s x1, x9, x9
cv.lbu x22, (x1), 4
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