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    • logik

      Public
      A configurable RTL to bitstream FPGA toolchain
      Python
      MIT License
      725610Updated Dec 17, 2024Dec 17, 2024
    • Communication framework for RTL simulation and emulation.
      Python
      Apache License 2.0
      21264350Updated Dec 17, 2024Dec 17, 2024
    • umi

      Public
      Universal Memory Interface (UMI)
      Verilog
      Apache License 2.0
      1214263Updated Dec 16, 2024Dec 16, 2024
    • Demo: how to create a custom EBRICK
      SystemVerilog
      Apache License 2.0
      01601Updated Nov 20, 2024Nov 20, 2024
    • sbtest

      Public
      Docker image with RTL simulation tools preinstalled
      Dockerfile
      Apache License 2.0
      0000Updated May 15, 2024May 15, 2024
    • zaui

      Public
      Generate a website from markdown with a minimum of fuss.
      Svelte
      MIT License
      0921Updated Apr 4, 2024Apr 4, 2024