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Fix simulation mismatch between VCS and QuestaSim #81

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merged 3 commits into from
Jul 20, 2023
Merged

Fix simulation mismatch between VCS and QuestaSim #81

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49bb845
[fix] Fix issue in snitch_addr_demux
Xeratec Apr 5, 2023
dd4298c
[fix] Adhere to custom compiler for VCS
Xeratec Mar 31, 2023
09df703
[change] Adapted changelog
Xeratec Apr 17, 2023
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6 changes: 5 additions & 1 deletion CHANGELOG.md
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Expand Up @@ -7,8 +7,12 @@ and this project adheres to [Semantic Versioning](http://semver.org/spec/v2.0.0.

## Unreleased

## Changes
### Changes
- Extended `tracevis.py` to support the new Perfetto UI and compress large traces
- Use custom compiler for VCS specified with `CC` and `CCX` environment variable

### Fixed
- Fix type issue in `snitch_addr_demux`

## 0.6.0 - 2023-01-09

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4 changes: 2 additions & 2 deletions hardware/Makefile
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Expand Up @@ -189,12 +189,12 @@ $(buildpath)/compilevcs.sh: $(bender) $(config_mk) Makefile $(MEMPOOL_DIR)/Bende
compile_vcs_simv: elabvcs $(buildpath)/mempool_simv
$(buildpath)/mempool_simv: $(buildpath)/compilevcs.sh $(buildpath)/$(dpi_library)/mempool_vcs_dpi.so
cd $(buildpath) && \
$(vcs_cmd) vcs -full64 $(top_level) $(dpi_library)/mempool_vcs_dpi.so -debug_access=r -kdb -assert disable_cover -o mempool_simv
$(vcs_cmd) vcs -full64 $(top_level) -cc $(CC) -cpp $(CXX) -ld $(CXX) $(dpi_library)/mempool_vcs_dpi.so -debug_access=r -kdb -assert disable_cover -o mempool_simv

compile_vcs_simvopt: elabvcs $(buildpath)/mempool_simvopt
$(buildpath)/mempool_simvopt: $(buildpath)/compilevcs.sh $(buildpath)/$(dpi_library)/mempool_vcs_dpi.so
cd $(buildpath) && \
$(vcs_cmd) vcs -full64 $(top_level) $(dpi_library)/mempool_vcs_dpi.so -assert disable_cover -o mempool_simvopt
$(vcs_cmd) vcs -full64 $(top_level) -cc $(CC) -cpp $(CXX) -ld $(CXX) $(dpi_library)/mempool_vcs_dpi.so -assert disable_cover -o mempool_simvopt

# Simulation
simvcs: compile_vcs_simv
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19 changes: 14 additions & 5 deletions hardware/src/snitch_addr_demux.sv
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Expand Up @@ -38,16 +38,25 @@ module snitch_addr_demux
input address_map_t [NumRules-1:0] address_map_i
);

logic [LogNrOutput-1:0] slave_select;
logic [NumRules-1:0] addr_match;
logic [idx_width(NumRules)-1:0] rule_select;
localparam type idx_t = logic [LogNrOutput-1:0];

assign slave_select = address_map_i[rule_select].slave_idx;
idx_t slave_select;
address_map_t addr_select;
logic [NumRules-1:0] addr_match;
logic [idx_width(NumRules)-1:0] rule_select;

// Address Decoder
always_comb begin : addr_decoder
addr_match = '0;
slave_select = '0;
addr_select = '0;

for (int i = 0; i < NumRules; i++) begin
addr_match[i] = (req_addr_i & address_map_i[i].mask) == address_map_i[i].value;
if ((req_addr_i & address_map_i[i].mask) == address_map_i[i].value) begin
addr_match[i] = 1'b1;
addr_select = address_map_i[rule_select];
slave_select = idx_t'(addr_select.slave_idx);
end
end
end

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