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allow user to change bench options - riscv #20

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malus-brandywine
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DefaultBenchDeps is set to TRUE when benchmark suite is being built for
RiscV to enable configure benchmark options.

Signed-off-by: Nataliya Korovkina [email protected]

@axel-h
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axel-h commented Feb 14, 2022

Based on the comment #17 (comment), it seem the least we could add in the code is a more verbose comment. Is there a fundamental setup conflict now, that block running a custom benchmark set on RISC-V, which needs to be resolved?

@malus-brandywine
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The solution requires some other modifications. I'll take care of it within next few days.

@malus-brandywine
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As follow up of the #17 (comment) I checked the code.

Currently, event counters are supported only for HiFive, according to sel4bench.h

It means IPC bench which uses event counters will be built, but will NOT be functional for other platforms. IPC benchmark is ON by default.

Back to DefaultBenchDeps. Options depending on DefaultBenchDeps can be redefined in easy-settings.cmake and command line only if DefaultBenchDeps set to TRUE, otherwise benchmark options' values are set to local defaults.

Currently, the options depending on DefaultBenchDeps are only the ones that switch ON/OFF the whole corresponding application.

The patch will allow to manually pick up benchmark applications for RISC-V platforms, therefore to exclude IPC benchmark when needed.

@malus-brandywine
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The recent tests failed because the command line contained -DFAULT=TRUE for RISC-V.

With the option DefaultBenchDeps set to TRUE command line options make an effect now.

Should we change command line parameters in the test?

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axel-h commented Feb 17, 2022

  • Style nitpicking: please change the commit description to: "bench/risc-v: allow user to change options"
  • concerning the configuration, I'm a bit lost now. So the blocker is that the apps/fault benchmark app fails on RISC-V? This should become a separate issue then, which needs to be fixed. Once that is done, it could be made a know issue where a (temporary) work around is disabling this for RISC-V in the hw tests, so the fine grained user configurability from this PR can be merged.

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malus-brandywine commented Feb 17, 2022

  • Style nitpicking: please change the commit description to: "bench/risc-v: allow user to change options"

I definitely will.

  • concerning the configuration, I'm a bit lost now. So the blocker is that the apps/fault benchmark app fails on RISC-V? This should become a separate issue then, which needs to be fixed. Once that is done, it could be made a know issue where a (temporary) work around is disabling this for RISC-V in the hw tests, so the fine grained user configurability from this PR can be merged.

apps/fault never was supported for risc-v.
The tests that use init-build.sh with parameter -DFAULT=TRUE were successful because the parameter was ignored (DefaultBenchDeps was FALSE) and by default apps/fault is not built.

So, the used command line:
init-build.sh -DFASTPATH=TRUE -DHARDWARE=TRUE -DFAULT=TRUE -DRISCV64=TRUE -DPLATFORM=hifive
was misleading (apps/hardware is off by default as well).

I will open new issue about unsupported apps/fault #25 (comment)
(apps/hardware is successfully been built)

As for this PR, while apps/fault is not supported I would suggest to correct the command line for risc-v to:

init-build.sh -DFASTPATH=TRUE -DHARDWARE=TRUE -DRISCV64=TRUE -DPLATFORM=hifive

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axel-h commented Feb 17, 2022

Thanks, now I get it. Seem changing the CI workflow parameters can happen at these places:

@malus-brandywine
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Thank you, I'll fix it

@kent-mcleod
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Currently, the options depending on DefaultBenchDeps are only the ones that switch ON/OFF the whole corresponding application.

One of the configuration requirements of sel4bench is that it will only allow benchmarks to be configured and built that are supported. Otherwise someone who isn't intimately familiar with sel4bench can't tell that the benchmarks they've configured are unsupported. DefaultBenchDeps is sort of a big lock around several benchmarks that requires them to either be all supported by a platform, or none supported by a platform.

Removing the RISCV restriction should require that the minimum set of required benchmarks are now supported. It should then only be removed as a restriction only on the supported platforms that can successfully run these benchmarks.

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malus-brandywine commented Feb 18, 2022

In that case I will postpone the PR until the apps/fault is supported.

But I would suggest to remove parameters -DHARDWARE=TRUE -DFAULT=TRUE for HiFive from Performance webpage. For ones who aren't closely familiar with sel4bench it's misleading, they will not get those benchmarks anyway.

As well as from CI tests, to avoid confusion caused by difference of parameters here and there.

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axel-h commented Mar 15, 2022

@malus-brandywine Did you intend to close this or just accidently updated the master branch?

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@axel-h I didn't drop the idea, but the commit has been postponed (prev. comment). I'm going to make another commit related to other task soon, it will go as another PR.

The changes I made in this commit are saved in a local branch. I'm going to revive them later.

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But I would suggest to remove parameters -DHARDWARE=TRUE -DFAULT=TRUE for HiFive from Performance webpage. For ones who aren't closely familiar with sel4bench it's misleading, they will not get those benchmarks anyway.

As well as from CI tests, to avoid confusion caused by difference of parameters here and there.

This is a good idea

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lsf37 commented Mar 16, 2022

I'll have a look at that.

lsf37 added a commit to seL4/ci-actions that referenced this pull request Jul 7, 2022
See #203 and seL4/sel4bench#20 for background.

Signed-off-by: Gerwin Klein <[email protected]>
lsf37 added a commit to seL4/ci-actions that referenced this pull request Jul 11, 2022
See #203 and seL4/sel4bench#20 for background.

Signed-off-by: Gerwin Klein <[email protected]>
lsf37 added a commit to seL4/ci-actions that referenced this pull request Jul 11, 2022
See #203 and seL4/sel4bench#20 for background.

Signed-off-by: Gerwin Klein <[email protected]>
alwin-joshy added a commit to alwin-joshy/sel4bench that referenced this pull request Sep 10, 2024
Applies patch from seL4#20. This was
not merged previously as RISC-V did not implement the hardware and
fault benchmarks, but this is no longer the case.

Signed-off-by: Alwin Joshy <[email protected]>
alwin-joshy added a commit to alwin-joshy/sel4bench that referenced this pull request Sep 10, 2024
Applies patch from seL4#20. This was
not merged previously as RISC-V did not implement the hardware and
fault benchmarks, but this is no longer the case.

Signed-off-by: Alwin Joshy <[email protected]>
alwin-joshy added a commit to alwin-joshy/sel4bench that referenced this pull request Sep 10, 2024
Applies patch from seL4#20. This was
not merged previously as RISC-V did not implement the hardware and
fault benchmarks, but this is no longer the case.

Signed-off-by: Alwin Joshy <[email protected]>
alwin-joshy added a commit to alwin-joshy/sel4bench that referenced this pull request Sep 10, 2024
Applies patch from seL4#20. This was
not merged previously as RISC-V did not implement the hardware and
fault benchmarks, but this is no longer the case.

Signed-off-by: Alwin Joshy <[email protected]>
alwin-joshy added a commit to alwin-joshy/sel4bench that referenced this pull request Sep 10, 2024
Applies patch from seL4#20. This was
not merged previously as RISC-V did not implement the hardware and
fault benchmarks, but this is no longer the case.

Signed-off-by: Alwin Joshy <[email protected]>
alwin-joshy added a commit to alwin-joshy/sel4bench that referenced this pull request Sep 10, 2024
Applies patch from seL4#20. This was
not merged previously as RISC-V did not implement the hardware and
fault benchmarks, but this is no longer the case.

Signed-off-by: Alwin Joshy <[email protected]>
alwin-joshy added a commit to alwin-joshy/sel4bench that referenced this pull request Sep 10, 2024
Applies patch from seL4#20. This was
not merged previously as RISC-V did not implement the hardware and
fault benchmarks, but this is no longer the case.

Signed-off-by: Alwin Joshy <[email protected]>
alwin-joshy added a commit to alwin-joshy/sel4bench that referenced this pull request Sep 10, 2024
Applies patch from seL4#20. This was
not merged previously as RISC-V did not implement the hardware and
fault benchmarks, but this is no longer the case.

Signed-off-by: Alwin Joshy <[email protected]>
alwin-joshy added a commit to alwin-joshy/sel4bench that referenced this pull request Sep 10, 2024
Applies patch from seL4#20. This was
not merged previously as RISC-V did not implement the hardware and
fault benchmarks, but this is no longer the case.

Signed-off-by: Alwin Joshy <[email protected]>
alwin-joshy added a commit to alwin-joshy/sel4bench that referenced this pull request Sep 11, 2024
Applies patch from seL4#20. This was
not merged previously as RISC-V did not implement the hardware and
fault benchmarks, but this is no longer the case.

Signed-off-by: Alwin Joshy <[email protected]>
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4 participants