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BANDGAP

Pepijn de Vos edited this page Nov 19, 2024 · 3 revisions

The BANDGAP primitive is used to provide constant voltage and current for certain modules in the chip, including OSC, PLL, and FLASH. If turned off, this can reduce power consumption. It is supported by the LittleBee family series, specifically devices GW1NZ, GW1N, and GW1NR.

This device is supported in Apicula

Ports

Port Size Direction
BGEN 1 input

Verilog Instantiation

BANDGAP bandgap_inst (
    .BGEN(BGEN)
);
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