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ara: fix parametrization
Verible #249: Commit faa1947 pushed by mp-17
November 5, 2024 22:22 56s mp/pulp-v2
November 5, 2024 22:22 56s
load_store_unit: add MMU accelerator port
Verible #248: Commit a101e35 pushed by mp-17
November 5, 2024 17:18 48s mp/pulp-v2
November 5, 2024 17:18 48s
wt_dcache_buffer: Avoid out-of-range user signal access
Verible #247: Commit 5dfb893 pushed by mp-17
November 5, 2024 12:44 48s mp/pulp-v2
November 5, 2024 12:44 48s
fixup! coherence: Pack Valid/Dirty SRAM (#36)
Verible #246: Commit 1139c21 pushed by niwis
November 4, 2024 09:25 57s nw/v2-chs
November 4, 2024 09:25 57s
ci: Always upload artifacts
Verible #245: Commit 431ff0c pushed by paulsc96
November 1, 2024 19:30 49s paulsc/v2-chs-dbg
November 1, 2024 19:30 49s
Revert "Add CLIC support (#10)"
Verible #244: Commit 0148248 pushed by paulsc96
November 1, 2024 16:02 48s paulsc/v2-chs-dbg
November 1, 2024 16:02 48s
cache_ctrl: Generalise AXI offset generation
Verible #243: Commit f3856fe pushed by niwis
November 1, 2024 09:19 56s nw/v2-chs
November 1, 2024 09:19 56s
coherence: Pack Valid/Dirty SRAM (#36)
Verible #242: Commit db913d2 pushed by niwis
November 1, 2024 03:58 57s nw/v2-chs
November 1, 2024 03:58 57s
coherence: Pack Valid/Dirty SRAM (#36)
Verible #241: Commit c7479a5 pushed by niwis
November 1, 2024 03:31 55s nw/v2-chs
November 1, 2024 03:31 55s
Add AW lock register to handle W FIFO push signal (#2461)
Verible #240: Commit 8b2b2d7 pushed by niwis
October 31, 2024 04:28 56s nw/pulp-v1
October 31, 2024 04:28 56s
Add AW lock register to handle W FIFO push signal (#2461)
Verible #239: Commit 0ca1179 pushed by niwis
October 31, 2024 04:24 48s nw/pulp-v1
October 31, 2024 04:24 48s
wt_dcache_buffer: Avoid out-of-range user signal access
Verible #238: Commit 5dfb893 pushed by paulsc96
October 24, 2024 17:08 58s paulsc/v2-chs
October 24, 2024 17:08 58s
fixup! Add CLIC support (#10)
Verible #237: Commit 05727c8 pushed by paulsc96
October 24, 2024 17:07 55s paulsc/v2
October 24, 2024 17:07 55s
fixup! Add CLIC support (#10)
Verible #236: Commit 19a1825 pushed by paulsc96
October 24, 2024 17:07 59s paulsc/v2-chs
October 24, 2024 17:07 59s
wt_dcache_buffer: Avoid out-of-range user signal access
Verible #235: Commit d3691e3 pushed by paulsc96
October 24, 2024 16:43 46s paulsc/v2
October 24, 2024 16:43 46s
wt_dcache_buffer: Avoid out-of-range user signal access
Verible #234: Commit 6a68b6e pushed by paulsc96
October 24, 2024 16:42 55s paulsc/v2-chs
October 24, 2024 16:42 55s
October 24, 2024 14:44 51s
Adjust fence.t CSRs write logic
Verible #231: Commit 4ca6fb1 pushed by ricted98
October 24, 2024 09:52 55s rt/nw/fence_t_32
October 24, 2024 09:52 55s
Adjust fence.t CSRs write logic
Verible #230: Commit f433019 pushed by ricted98
October 24, 2024 09:41 46s rt/nw/fence_t_32
October 24, 2024 09:41 46s
ci: Update phiwag/edatools gpg key (#2515)
Verible #229: Commit 6330fa2 pushed by niwis
October 24, 2024 04:09 53s nw/fence_t_32
October 24, 2024 04:09 53s
fence.t: Support 32-bit config
Verible #228: Commit a1c3aa0 pushed by niwis
October 24, 2024 03:56 44s nw/fence_t_32
October 24, 2024 03:56 44s
October 23, 2024 15:57 51s
FPU: Bump to pulp-v0.2.3 (extends #25)
Verible #226: Commit 1f7909a pushed by paulsc96
October 23, 2024 15:44 48s paulsc/v2-chs
October 23, 2024 15:44 48s
FPU: Bump to pulp-v0.2.3 (extends #25)
Verible #225: Commit 1f7909a pushed by paulsc96
October 23, 2024 15:07 54s paulsc/v2-dbg
October 23, 2024 15:07 54s